Low-voltage low-noise gate driven quasi-floating bulk self-cascode current mirror operational transconductance amplifier

2021 ◽  
Vol 92 (3) ◽  
pp. 034717
Author(s):  
K. Sharma ◽  
R. Sharma
Keyword(s):  
Low Voltage ◽  
Low Noise ◽  
Current Mirror ◽  
Operational Transconductance Amplifier ◽  
Transconductance Amplifier ◽  
Self Cascode ◽  
Cascode Current Mirror

Low Power Operational Transconductance Amplifier (OTA) with Enhanced DC Gain and Slew-Rate

2013 ◽  
Vol 411-414 ◽  
pp. 1645-1648
Author(s):  
Xiao Zong Huang ◽  
Lun Cai Liu ◽  
Jian Gang Shi ◽  
Wen Gang Huang ◽  
Fan Liu ◽  
...  
Keyword(s):  
Low Voltage ◽  
Cmos Technology ◽  
Optimization Techniques ◽  
Current Mirror ◽  
Slew Rate ◽  
Operational Transconductance Amplifier ◽  
Theory Analysis ◽  
Transconductance Amplifier ◽  
Dc Gain ◽  
Simulation Results

This paper presents a low-voltage differential operational transconductance amplifier (OTA) with enhanced DC gain and slew-rate. Based on the current mirror OTA topology, the optimization techniques are discussed in this work. The proposed structure achieves enhanced DC gain, unit gain frequency (UGF) and slew-rate (SR) with adding four devices. The design of the OTA is described with theory analysis. The OTA operates at the power supply of 1.8V. Simulation results for 0.18μm standard CMOS technology show that the DC gain increases from 60.6dB to 65dB, the UGF is optimized from 2.5MHz to 4.3MHz, the SR is enhanced from 0.88 V/μs to 4.8 V/μs with close power consumption dramatically.

scholarly journals Design of Low Voltage Quasi-floating Self Cascode Current Mirror

2021 ◽  
Vol 7 (4) ◽  
pp. 33-45
Author(s):  
P. Anil ◽  
S. Tamil ◽  
N. Raj
Keyword(s):  
Low Voltage ◽  
Floating Gate ◽  
The Other ◽  
Current Mirror ◽  
Saturation Regime ◽  
Linear Region ◽  
Operating Region ◽  
Source Voltage ◽  
Self Cascode ◽  
Cascode Current Mirror

In this paper, a modified structure of self-cascode structure is proposed. In the proposed structure, the MOSFET working in saturation mode is replaced by a Quasi-floating gate MOSFET by which the threshold voltage can be scaled, resulting in an increase in the drain-to-source voltage of other MOSFET operating in the linear region. The increased drain-to-source voltage results in a change in the operating region, which here is from linear to saturation regime. To exploit the performance of the proposed structure, the design of the current mirror circuit is shown in this paper. The proposed architecture when compared with its conventional design showed improvement in performance without affecting the other parameters. The complete design is done using MOSFET models of 180nm technology using Spice at supply dual supply of 0.5V.

scholarly journals Design of Low Voltage Low Power High Gain Operational Transconductance Amplifier

2021 ◽  
Vol 7 (4) ◽  
pp. 103-110
Author(s):  
Rajesh Durgam ◽  
S. Tamil ◽  
Nikhil Raj
Keyword(s):  
Low Voltage ◽  
Cmos Technology ◽  
High Gain ◽  
Floating Gate ◽  
Operational Transconductance Amplifier ◽  
Linear Mode ◽  
Low Voltage Operation ◽  
Transconductance Amplifier ◽  
Amplifier Design ◽  
Self Cascode

In this paper, a high gain structure of operational transconductance amplifier is presented. For low voltage operation with improved frequency response bulk driven quasi-floating gate MOSFET is used at the input. Further for achieving high gain the modified self cascode structure is used at the output. Compared to conventional self cascode the modified self cascode structure used provides higher transconductance which helps in significant boosting of gain of the amplifier. The modification is achieved by employing quasi-floating gate transistor which helps in scaling of the threshold which as a result increases the drain-to-source voltage of linear mode transistor thus changing it to saturation. This change of mode boosts the effective transconductance of self cascode MOSFET. The proposed operational transconductance amplifier when compared to its conventional showed improvement in DC gain by 30dB and also the unity gain bandwidth increases by 6 fold. The MOS models used for amplifier design are of 0.18µm CMOS technology at supply of 0.5V.

scholarly journals FinFET Based Tunable Analog Circuit: Design and Analysis at 45 nm Technology

2013 ◽  
Vol 2013 ◽  
pp. 1-8 ◽  
Author(s):  
Ravindra Singh Kushwah ◽  
Shyam Akashe
Keyword(s):  
Analog Circuits ◽  
High Performance ◽  
Analog Circuit ◽  
Schmitt Trigger ◽  
Low Noise ◽  
Operational Transconductance Amplifier ◽  
Back Gate ◽  
Amplifier Circuit ◽  
Tunable Circuits ◽  
Transconductance Amplifier

We included a designing of low power tunable analog circuits built using independently driven FinFETs devices, where the controlling of the back gate provide the output on the front gate. We show that this could be an effective solution to conveniently tune the output of bulk CMOS analog circuits particularly for Schmitt trigger and operational transconductance amplifier circuits. FinFET devices can be used to increase the performance by reducing the leakage current and power dissipation, because front and back gates both are independently controlled. FinFET device has a higher controllability, resulting relatively high Ion/Ioff ratio. In this paper, we proposed a tunable analog circuit such as CMOS amplifier circuit, Schmitt trigger circuit, and operational transconductance amplifier circuit, these circuit blocks are necessary for low noise high performance ICs for analog applications. Gain, phase, group delay, and output response of analog tunable circuits have been discussed in this paper. The proposed FinFET based analog tunable circuits have been designed using Cadence Virtuoso tool at 45 nm.

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