scholarly journals Protection-failure mechanism of alkalinization and cathodic protection focusing on coating/metal interfaces

AIP Advances ◽  
2021 ◽  
Vol 11 (3) ◽  
pp. 035217
Author(s):  
Chao Yang ◽  
Qing Han ◽  
Anquan Wang ◽  
Yong Yang ◽  
Xiyan Li
Keyword(s):  
Failure Mechanism ◽  
Cathodic Protection ◽  
Metal Interfaces

On the role of tin underlays for the prevention of thermal grooving in thin gold films

1986 ◽  
Vol 44 ◽  
pp. 732-733
Author(s):  
Jin Young Kim ◽  
R. E. Hummel ◽  
R. T. DeHoff
Keyword(s):  
Thin Film ◽  
Free Surface ◽  
Grain Boundary ◽  
Beneficial Effect ◽  
Failure Mechanism ◽  
Failure Mechanisms ◽  
Distinct Advantage ◽  
Gold Films ◽  
Gold Thin Film

Gold thin film metallizations in microelectronic circuits have a distinct advantage over those consisting of aluminum because they are less susceptible to electromigration. When electromigration is no longer the principal failure mechanism, other failure mechanisms caused by d.c. stressing might become important. In gold thin-film metallizations, grain boundary grooving is the principal failure mechanism.Previous studies have shown that grain boundary grooving in gold films can be prevented by an indium underlay between the substrate and gold. The beneficial effect of the In/Au composite film is mainly due to roughening of the surface of the gold films, redistribution of indium on the gold films and formation of In2O3 on the free surface and along the grain boundaries of the gold films during air annealing.

Influence of Air Entrappment on Flood Embankment Failure Mechanism - Model Tests

2008 ◽  
Vol 11 (-1) ◽  
pp. 188-201 ◽  
Author(s):  
Piotr Bogacz ◽  
Jarosława Kaczmarek ◽  
Danuta Leśniewska
Keyword(s):  
Failure Mechanism ◽  
Model Tests ◽  
Mechanism Model

Application of Lock-in Thermography on PCB for Fault Localization and Validation of Failure Mechanism Due to External Discrete Component Variation

2010 ◽  
Author(s):  
William Ng ◽  
Kevin Weaver ◽  
Zachary Gemmill ◽  
Herve Deslandes ◽  
Rudolf Schlangen
Keyword(s):  
Failure Mechanism ◽  
Integrated Circuit ◽  
Printed Circuit Board ◽  
Hot Spot ◽  
Circuit Board ◽  
Discrete Component ◽  
Printed Circuit ◽  
Thermal Signature ◽  
Lock In

Abstract This paper demonstrates the use of a real time lock-in thermography (LIT) system to non-destructively characterize thermal events prior to the failing of an integrated circuit (IC) device. A case study using a packaged IC mounted on printed circuit board (PCB) is presented. The result validated the failing model by observing the thermal signature on the package. Subsequent analysis from the backside of the IC identified a hot spot in internal circuitry sensitive to varying value of external discrete component (inductor) on PCB.

Case Study in Fault Isolation of a Metal Short for Yield Enhancement

2010 ◽  
Author(s):  
Sarven Ipek ◽  
David Grosjean
Keyword(s):  
Failure Analysis ◽  
Failure Mechanism ◽  
Photon Emission ◽  
Fault Isolation ◽  
Yield Enhancement ◽  
Analysis Technique ◽  
Laser Signal ◽  
Signal Injection ◽  
Microscopy Techniques

Abstract The application of an individual failure analysis technique rarely provides the failure mechanism. More typically, the results of numerous techniques need to be combined and considered to locate and verify the correct failure mechanism. This paper describes a particular case in which different microscopy techniques (photon emission, laser signal injection, and current imaging) gave clues to the problem, which then needed to be combined with manual probing and a thorough understanding of the circuit to locate the defect. By combining probing of that circuit block with the mapping and emission results, the authors were able to understand the photon emission spots and the laser signal injection microscopy (LSIM) signatures to be effects of the defect. It also helped them narrow down the search for the defect so that LSIM on a small part of the circuit could lead to the actual defect.

Unique Autoclave Stress Induced Failure Mechanism

2005 ◽  
Author(s):  
John Butchko ◽  
Bruce T. Gillette
Keyword(s):  
Corrosion Rate ◽  
Grain Boundary ◽  
Failure Analysis ◽  
Failure Mechanism ◽  
Metal Corrosion ◽  
Corrosion Mechanism ◽  
Reliability Testing ◽  
Process Change ◽  
Transistor Reliability ◽  
Pass Through

Abstract Autoclave Stress failures were encountered at the 96 hour read during transistor reliability testing. A unique metal corrosion mechanism was found during the failure analysis, which was creating a contamination path to the drain source junction, resulting in high Idss and Igss leakage. The Al(Si) top metal was oxidizing along the grain boundaries at a faster rate than at the surface. There was subsurface blistering of the Al(Si), along with the grain boundary corrosion. This blistering was creating a contamination path from the package to the Si surface. Several variations in the metal stack were evaluated to better understand the cause of the failures and to provide a process solution. The prevention of intergranular metal corrosion and subsurface blistering during autoclave testing required a materials change from Al(Si) to Al(Si)(Cu). This change resulted in a reduced corrosion rate and consequently prevented Si contamination due to blistering. The process change resulted in a successful pass through the autoclave testing.

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