scholarly journals High-performance monolayer MoS2 field-effect transistor with large-scale nitrogen-doped graphene electrodes for Ohmic contact

2019 ◽  
Vol 115 (1) ◽  
pp. 012104 ◽  
Author(s):  
Dongjea Seo ◽  
Dong Yun Lee ◽  
Junyoung Kwon ◽  
Jea Jung Lee ◽  
Takashi Taniguchi ◽  
...  
2021 ◽  
Vol 129 (14) ◽  
pp. 145106
Author(s):  
Sameer Kumar Mallik ◽  
Sandhyarani Sahoo ◽  
Mousam Charan Sahu ◽  
Sanjeev K. Gupta ◽  
Saroj Prasad Dash ◽  
...  

2019 ◽  
Vol 9 (6) ◽  
pp. 629-634 ◽  
Author(s):  
Fengjuan Miao ◽  
Rui Miao ◽  
Zang Yu ◽  
Cuiping Shi ◽  
Lei Zhu ◽  
...  

A hybrid electrode composed of silicon microchannel plates (Si MCPs) coated with nitrogen-doped graphene and TiO2 is prepared and used as the anode in a lithium-ion battery. The materials are characterized systematically by scanning electron microscopy, Raman scattering spectroscopy, X-ray photoelectron spectroscopy, and electrochemical techniques. The unique porous and ordered nanostructure of the TiO2/N-graphene/Si-MCP nanocomposite provides short paths for diffusion of Li ions and immobilized active sites, whereas N-doped graphene facilitates fast charge transportation. The synergetic effects result in high reversible specific capacities and stability. Owing to the compatibility with semiconductor processing and devices, the concept and technique have large potential in large-scale fabrication of high-performance anodes of lithium-ion batteries, especially those integrated into microelectronic chips.


2021 ◽  
Vol 5 (1) ◽  
Author(s):  
Aryan Afzalian

AbstractUsing accurate dissipative DFT-NEGF atomistic-simulation techniques within the Wannier-Function formalism, we give a fresh look at the possibility of sub-10-nm scaling for high-performance complementary metal oxide semiconductor (CMOS) applications. We show that a combination of good electrostatic control together with high mobility is paramount to meet the stringent roadmap targets. Such requirements typically play against each other at sub-10-nm gate length for MOS transistors made of conventional semiconductor materials like Si, Ge, or III–V and dimensional scaling is expected to end ~12 nm gate-length (pitch of 40 nm). We demonstrate that using alternative 2D channel materials, such as the less-explored HfS2 or ZrS2, high-drive current down to ~6 nm is, however, achievable. We also propose a dynamically doped field-effect transistor concept, that scales better than its MOSFET counterpart. Used in combination with a high-mobility material such as HfS2, it allows for keeping the stringent high-performance CMOS on current and competitive energy-delay performance, when scaling down to virtually 0 nm gate length using a single-gate architecture and an ultra-compact design (pitch of 22 nm). The dynamically doped field-effect transistor further addresses the grand-challenge of doping in ultra-scaled devices and 2D materials in particular.


2021 ◽  
Author(s):  
Dongha Shin ◽  
Hwa Rang Kim ◽  
Byung Hee Hong

Since of its first discovery, graphene has attracted much attention because of the unique electrical transport properties that can be applied to high-performance field-effect transistor (FET). However, mounting chemical functionalities...


2017 ◽  
Vol 1 (1) ◽  
pp. 143-153 ◽  
Author(s):  
Xiaoning Tian ◽  
Xiaolong Sun ◽  
Zhongqing Jiang ◽  
Zhong-Jie Jiang ◽  
Xiaogang Hao ◽  
...  

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