Real-time self-adaptive calibration method for high speed acquisition system

2019 ◽  
Vol 90 (1) ◽  
pp. 015118 ◽  
Author(s):  
Hao Zeng ◽  
Peng Ye ◽  
Wentao Wei ◽  
Lianping Guo ◽  
Huiqing Pan ◽  
...  
Keyword(s):  
Real Time ◽  
High Speed ◽  
Calibration Method ◽  
Acquisition System ◽  
Adaptive Calibration ◽  
Self Adaptive

Self‐Adaptive Calibration of Real‐Time Demand and Roughness of Water Distribution Systems

2018 ◽  
Vol 54 (8) ◽  
pp. 5536-5550 ◽  
Author(s):  
Xiao Zhou ◽  
Weirong Xu ◽  
Kunlun Xin ◽  
Hexiang Yan ◽  
Tao Tao
Keyword(s):  
Real Time ◽  
Distribution Systems ◽  
Water Distribution ◽  
Water Distribution Systems ◽  
Adaptive Calibration ◽  
Self Adaptive

Design of a High-Speed Image Data Real-Time Storage and Display Circuit

2014 ◽  
Vol 912-914 ◽  
pp. 1222-1227 ◽  
Author(s):  
Cheng Qun Chu ◽  
Yong Feng Ren ◽  
Fang Ma
Keyword(s):  
Real Time ◽  
High Speed ◽  
Image Acquisition ◽  
Image Data ◽  
Data Access ◽  
Acquisition System ◽  
Nand Flash ◽  
Large Capacity ◽  
Storage Rate ◽  
Internal Block

The needs of large-capacity storage in high-speed image acquisition systems require the design of reliable and efficient storage instruments. The paper presents a FPGA-based high-speed storage instrument for high speed Camera Link image acquisition system. The FPGA processes the input data and stores the results into the storage array. Multi-chip large-capacity SLC NAND Flash chips constitute a storage array, with up to 100MByte/s storage rate, is used for the digitization image signals. A multilevel high-speed buffer structure based on abundant internal block RAM resources in FPGA is used for speeding up data access. At the same time, it can take advantage of FPGA constructing the corresponding VGA timing signals to control the video conversion chip ADV7123 to realize the function of real-time display. After a description of the proposed hardware and solutions, an experimental was built to test the performance. The results have shown that the FPGA-based acquisition system is a compact and flexible solution for high-speed image acquisition applications.

scholarly journals A Self-Adaptive Frequency Response Compensation Method for a TIADC System

2013 ◽  
Vol 2013 ◽  
pp. 1-7 ◽  
Author(s):  
Peng Ye ◽  
Huiqing Pan ◽  
Hao Zeng ◽  
Min Li ◽  
Wuhuang Huang
Keyword(s):  
Frequency Response ◽  
System Performance ◽  
High Speed ◽  
Compensation Method ◽  
Acquisition System ◽  
Time Interleaving ◽  
Sampling Systems ◽  
Self Adaptive ◽  
High Speed Sampling

Time interleaving is one of the most efficient techniques employed in high-speed sampling systems. However, the frequency response mismatch among different channels will create distortion tones that degrade the system performance. In this paper, a self-adaptive frequency response mismatch compensation method is presented, where the design of compensation filter is optimized with a self-adapting strategy. This digital postprocessing technique realizes the compensation of frequency response effectively and also the increase of the digital bandwidth of the acquisition system. MATLAB-based simulation and an actual two-channel acquisition system test verify the effectiveness of the algorithm.

A Study of a Normalized Error Calibration Method Based on Parallel High-Speed Data Acquisition System

2015 ◽  
Vol 738-739 ◽  
pp. 551-555
Author(s):  
Wen Xian Zeng ◽  
Yang Zhao ◽  
Zhi Qiang He
Keyword(s):  
Data Acquisition ◽  
High Speed ◽  
Dynamic Balance ◽  
Data Acquisition System ◽  
Calibration Method ◽  
Acquisition System ◽  
Normalized Error ◽  
Gain Error ◽  
High Speed Data Acquisition ◽  
High Speed Data

For Offset error and Gain error brought by multi-channel parallel alternate technology in high-speed data acquisition system, this paper proposes a progressive dynamic balance of error normalized calibration method. And in the high-speed data acquisition system of 1GSPS experimental platform consisting of 8 ADC, the program is carried out by experiments. The results show that the method is simple, practical and stable and meets the design requirements.

Software Design Based on PLD High-Speed Data Acquisition System

2013 ◽  
Vol 798-799 ◽  
pp. 647-650
Author(s):  
Geng Zhang ◽  
Hao Xu
Keyword(s):  
Data Acquisition ◽  
Real Time ◽  
Software Design ◽  
High Speed ◽  
Data Acquisition System ◽  
Acquisition System ◽  
Data Sampling ◽  
Logic Function ◽  
High Speed Data Acquisition ◽  
High Speed Data

Data collection in the important position of modern industrial production and scientific research is increasingly outstanding, as well as the real-time collection, real-time transmission and real-time processing of high speed data acquisition requirements are constantly improve. In addition, for different occasions, the data acquisition system of data sampling parameters are different. PLD as a universal integrated circuit, its logic function according to user's programming on the device, this paper introduces the high-speed data acquisition system based on PLD, mainly expounds the software design of the system, this paper introduces a simple PLD system, using FPGA as the data acquisition chip, the main measure the infrared remote control code acquisition, based on EDA technology to design a core, using DMA access to data, to achieve high-speed system requirements.

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