Improving retention time in tunnel field effect transistor based dynamic memory by back gate engineering

2016 ◽  
Vol 119 (21) ◽  
pp. 214501 ◽  
Author(s):  
Nupur Navlakha ◽  
Jyi-Tsong Lin ◽  
Abhinav Kranti
Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1415 ◽  
Author(s):  
Jaehong Lee ◽  
Garam Kim ◽  
Sangwan Kim

In this study, the effects of back-gate bias on the subthreshold swing (S) of a tunnel field-effect transistor (TFET) were discussed. The electrostatic characteristics of the back-gated TFET were obtained using technology computer-aided design (TCAD) simulation and were explained using the concepts of turn-on and inversion voltages. As a result, S decreased, when the back-gate voltage increased; this behavior is attributed to the resultant increase in inversion voltage. In addition, it was found that the on–off current ratio of the TFET increased with a decrease in S due to the back-gate voltage.


2010 ◽  
Vol E93-C (5) ◽  
pp. 540-545 ◽  
Author(s):  
Dong Seup LEE ◽  
Hong-Seon YANG ◽  
Kwon-Chil KANG ◽  
Joung-Eob LEE ◽  
Jung Han LEE ◽  
...  

2021 ◽  
Vol 16 (1) ◽  
Author(s):  
Xiaoshi Jin ◽  
Yicheng Wang ◽  
Kailu Ma ◽  
Meile Wu ◽  
Xi Liu ◽  
...  

AbstractA bilateral gate-controlled S/D symmetric and interchangeable bidirectional tunnel field effect transistor (B-TFET) is proposed in this paper, which shows the advantage of bidirectional switching characteristics and compatibility with CMOS integrated circuits compared to the conventional asymmetrical TFET. The effects of the structural parameters, e.g., the doping concentrations of the N+ region and P+ region, length of the N+ region and length of the intrinsic region, on the device performances, e.g., the transfer characteristics, Ion–Ioff ratio and subthreshold swing, and the internal mechanism are discussed and explained in detail.


Sign in / Sign up

Export Citation Format

Share Document