Strain redistribution in free-standing bridge structure released from strained silicon-on-insulator

2014 ◽  
Vol 105 (19) ◽  
pp. 193505 ◽  
Author(s):  
Gaodi Sun ◽  
Miao Zhang ◽  
Zhongying Xue ◽  
Qinglei Guo ◽  
Da Chen ◽  
...  
Keyword(s):  
Silicon On Insulator ◽  
Strained Silicon ◽  
Bridge Structure ◽  
Free Standing

Strain analysis of free-standing strained silicon-on-insulator nanomembrane

2015 ◽  
Vol 24 (3) ◽  
pp. 036801
Author(s):  
Gao-Di Sun ◽  
Lin-Xi Dong ◽  
Zhong-Ying Xue ◽  
Da Chen ◽  
Qing-Lei Guo ◽  
...  
Keyword(s):  
Strain Analysis ◽  
Silicon On Insulator ◽  
Strained Silicon ◽  
Free Standing

Submicron mapping of strained silicon-on-insulator features induced

2007 ◽  
Vol 90 (17) ◽  
pp. 171919 ◽  
Author(s):  
Conal E. Murray ◽  
M. Sankarapandian ◽  
S. M. Polvino ◽  
I. C. Noyan ◽  
B. Lai ◽  
...  
Keyword(s):  
Silicon On Insulator ◽  
Strained Silicon

Observation of Crystalline Imperfections in Supercritical Thickness Strained Silicon on Insulator Wafers by Synchrotron X-ray Topography

2019 ◽  
Vol 16 (10) ◽  
pp. 539-543 ◽  
Author(s):  
Takayoshi Shimura ◽  
Tomoyuki Inoue ◽  
Yuki Okamoto ◽  
Takuji Hosoi ◽  
Hiroki Edo ◽  
...  
Keyword(s):  
Silicon On Insulator ◽  
Strained Silicon ◽  
X Ray

Finite Element Modelling of Air-Coupled Circular Capacitive Micromachined Ultrasonic Transducer for Anodic Bonding Process using SOI Wafer

2021 ◽  
Author(s):  
Gurpreet Singh Gill ◽  
Sanjay Kumar ◽  
Ravindra Mukhiya ◽  
Vinod Kumar Khanna
Keyword(s):  
Finite Element ◽  
Resonance Frequency ◽  
Glass Substrate ◽  
Ultrasonic Transducer ◽  
Fem Simulation ◽  
Silicon On Insulator ◽  
Anodic Bonding ◽  
Free Standing ◽  
Design Flexibility ◽  
Capacitive Micromachined Ultrasonic Transducer

Abstract Capacitive Micromachined Ultrasonic Transducer (CMUT) provides an alternative to commercial piezoelectric-based ultrasonic transducers due to its wide bandwidth, improved efficiency, sensitivity, and design flexibility [1, 2]. In this paper, Finite Element Method-based design and simulations of circular capacitive micromachined ultrasonic transducer (CMUT) is presented. The FEM simulation of air-coupled CMUT was accomplished by using MEMCAD tools CoventorWare® and COMSOL™. The resonance frequency of 3.9 MHz was achieved for the designed circular CMUT device. A favourable agreement was found for the resonance frequency and pull-in voltage of the device using MEMSCAD tools and analytical calculations. For the proposed CMUT design, a circular cavity will be formed inside the glass substrate. Then, a free-standing membrane will be released using active layer of silicon-on-insulator (SOI) wafer. The bulk silicon of SOI wafer will be removed after bonding it on the glass substrate using anodic bonding technique as described in fabrication process flow for CMUT.

New Strained Silicon-on-Insulator Fabricated by Laser-Annealing Technology

2005 ◽  
Vol 44 (4B) ◽  
pp. 2336-2339 ◽  
Author(s):  
Yasuyoshi Mishima ◽  
Hirohisa Ochimizu ◽  
Atsushi Mimura
Keyword(s):  
Laser Annealing ◽  
Silicon On Insulator ◽  
Strained Silicon

Multiwavelength micro-Raman analysis of strain in nanopatterned ultrathin strained silicon-on-insulator

2010 ◽  
Vol 97 (5) ◽  
pp. 053105 ◽  
Author(s):  
O. Moutanabbir ◽  
M. Reiche ◽  
A. Hähnel ◽  
M. Oehme ◽  
E. Kasper
Keyword(s):  
Silicon On Insulator ◽  
Strained Silicon ◽  
Raman Analysis

S63 X-ray Studies of Strained Silicon on Insulator

2008 ◽  
Vol 23 (2) ◽  
pp. 188-188
Author(s):  
M. Bibee ◽  
A. Mehta ◽  
S. Brennan ◽  
P. Pianetta
Keyword(s):  
Silicon On Insulator ◽  
Strained Silicon ◽  
X Ray

Nanoscale Heat Conduction in the SOI, Strained-Si and Tri-Gate Transistors

2004 ◽  
Author(s):  
Mehdi Asheghi
Keyword(s):  
Carrier Mobility ◽  
High Mobility ◽  
Silicon On Insulator ◽  
Strained Silicon ◽  
Device Performance ◽  
Strained Si ◽  
Insulator Layer ◽  
Junction Capacitance ◽  
Induced Changes ◽  
Soi Technology

There have been many attempts in the recent years to improve the device performance by enhancing carrier mobility by using the strained-induced changes in silicon electronic bands [1–4] or reducing the junction capacitance in silicon-on-insulator (SOI) technology. Strained silicon on insulator (SSOI) is another promising technology, which is expected to show even higher performance, in terms of speed and power consumption, comparing to the regular strained-Si transistors. In this technology, the strained silicon is incorporated in the silicon on insulator (SOI) technology such that the strained-Si introduces high mobility for electrons and holes and the insulator layer (usually SiO2) exhibits low junction capacitance due to its small dielectric constant [5, 6]. In these devices a layer of SiGe may exist between the strined-Si layer and insulator (strained Si-on-SiGe-on-insulator, SGOI) [6] or the strained-Si layer can be directly on top of the insulator [7]. Latter is advantageous for eliminating some of the key problems associated with the fabrication of SGOI.

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