Conversion of basal plane dislocations to threading edge dislocations in 4H-SiC epilayers by high temperature annealing

2012 ◽  
Vol 111 (12) ◽  
pp. 123512 ◽  
Author(s):  
Xuan Zhang ◽  
Hidekazu Tsuchida
Keyword(s):  
High Temperature ◽  
Basal Plane ◽  
High Temperature Annealing ◽  
Edge Dislocations

Conversion of Basal Plane Dislocations to Threading Edge Dislocations by High Temperature Annealing of 4H-SiC Epilayers

2012 ◽  
Vol 1433 ◽  
Author(s):  
Xuan Zhang ◽  
Hidekazu Tsuchida
Keyword(s):  
High Temperature ◽  
Basal Plane ◽  
Image Force ◽  
Line Tension ◽  
Grazing Incidence ◽  
High Temperature Annealing ◽  
X Ray ◽  
Before And After ◽  
Edge Dislocations ◽  
Epilayer Surface

ABSTRACTConversion of basal plane dislocations (BPDs) to threading edge dislocations (TEDs) has been observed in 4H-SiC epilayers by simple high temperature annealing. Grazing incidence reflection synchrotron X-ray topography was used to image the dislocations in the epilayers. By comparing the X-ray topographs before and after annealing, some of the BPDs were confirmed to convert to TEDs from the epilayer surface. The dislocation behaviors during annealing are explained and the mechanism of BPD conversion is discussed. It is argued that the conversion process is realized by constricted BPD segments cross-slipping to the prismatic plane driven by the image force and TED glide on its slip plane driven by the line tension. Certain kinetic processes may assist the formation of constrictions on the BPDs.

Annealing Behavior of Electrical Resistivities Perpendicular and Parallel to the Basal Plane of Heavily Nitrogen-Doped 4H-SiC Crystals

2018 ◽  
Vol 924 ◽  
pp. 293-296 ◽  
Author(s):  
Kiyo Okawa ◽  
Yuina Mannen ◽  
Kentaro Shioura ◽  
Noboru Ohtani ◽  
Masakazu Katsuno ◽  
...  
Keyword(s):  
High Temperature ◽  
Basal Plane ◽  
Stacking Fault ◽  
High Temperature Annealing ◽  
Annealing Behavior ◽  
Nitrogen Doped ◽  
Electrical Resistivities ◽  
C 30 ◽  
Induced Changes

The annealing behavior of electrical resistivities perpendicular and parallel to the basal plane of heavily nitrogen-doped 4H-SiC crystals was investigated. The temperature dependencies of the resistivities exhibited characteristic behaviors after multiple rounds of high-temperature annealing (1100°C, 30 min). High-temperature annealing induced stacking fault formation to various extents in heavily nitrogen-doped 4H-SiC crystals. Based on these results, we discuss the cause and mechanism of the observed annealing-induced changes in electrical resistivities of the crystals.

Mitigation of BPD by Pre-Epigrowth High Temperature Substrate Annealing

2016 ◽  
Vol 858 ◽  
pp. 233-236 ◽  
Author(s):  
Nadeemullah A. Mahadik ◽  
Robert E. Stahlbush ◽  
Eugene A. Imhoff ◽  
M.J. Tadjer ◽  
G.E. Ruland ◽  
...  
Keyword(s):  
Surface Roughness ◽  
Atomic Force Microscopy ◽  
High Temperature ◽  
Surface Morphology ◽  
Substrate Surface ◽  
High Temperature Annealing ◽  
Force Microscopy ◽  
Atomic Force ◽  
Substrate Annealing ◽  
Edge Dislocations

Basal Plane Dislocations (BPD) intersecting the SiC substrate surface were converted to threading edge dislocations (TED) by high temperature annealing of the substrates in the temperature range of 1750 °C – 1950 °C. Successively, epitaxial growth on annealed as well as non-annealed samples was performed, concurrently, to investigate the effect of the substrate annealing on BPD mitigation in the epilayers. For the 1950 °C/10min anneal, a 3x reduction in BPD density was observed. Additionally, surface roughness measured using atomic force microscopy revealed no degradation in surface morphology of the grown epilayers after annealing.

Basal Plane Dislocation Mitigation Using High Temperature Annealing in 4H-SiC Epitaxy

2013 ◽  
Vol 58 (4) ◽  
pp. 325-329
Author(s):  
N. A. Mahadik ◽  
A. Nath ◽  
E. A. Imhoff ◽  
R. E. Stahlbush ◽  
R. Nipoti
Keyword(s):  
High Temperature ◽  
Basal Plane ◽  
High Temperature Annealing ◽  
Basal Plane Dislocation

Post-Growth Reduction of Basal Plane Dislocations by High Temperature Annealing in 4H-SiC Epilayers

2014 ◽  
Vol 778-780 ◽  
pp. 324-327 ◽  
Author(s):  
Nadeemullah A. Mahadik ◽  
Robert E. Stahlbush ◽  
Anindya Nath ◽  
Marko J. Tadjer ◽  
Eugene A. Imhoff ◽  
...  
Keyword(s):  
High Temperature ◽  
Surface Morphology ◽  
Basal Plane ◽  
High Temperature Annealing ◽  
Complete Elimination ◽  
Growth Reduction

Basal Plane Dislocations (BPD) were reduced in 4H-SiC epilayers by high temperature annealing in the range of 1600 °C to 1950 °C using two annealing techniques. Samples annealed at > 1750 °C showed almost complete elimination of BPDs propagating from the substrate. However, surface morphology was degraded for MW annealed samples above 1800 °C, with new BPDs being generated from the surface. A new capping technique was developed along with application of high N2overpressure to preserve the surface morphology and avoid formation of new BPDs.

Bipolar Degradation of 6.5 kV SiC pn-Diodes: Result Prediction by Photoluminescence

2016 ◽  
Vol 858 ◽  
pp. 410-413 ◽  
Author(s):  
Larissa Wehrhahn-Kilian ◽  
Karl Otto Dohnke ◽  
Daniel Kaminzky ◽  
Birgit Kallinger ◽  
Steffen Oppel
Keyword(s):  
High Temperature ◽  
Basal Plane ◽  
Forward Bias ◽  
Crystal Defects ◽  
High Temperature Annealing ◽  
Stress Tests ◽  
Wafer Level ◽  
Electrical Stress ◽  
Implantation Process ◽  
The Stability

The stability of 6.5 kV pn-diodes is dependent on the absence of critical crystal defects, such as basal plane dislocations. In this paper, we present a method to detect these defects on wafer level by utilizing photoluminescence (PL). The PL scan is performed immediately after epitaxy and also after the implantation process steps with subsequent high temperature annealing. The analysis of both scans enables the prediction of devices that will drift due to bipolar degradation, and devices that will exhibit non-drifting behaviour. To validate this PL scanning technique, forward bias electrical stress tests have been performed on the fabricated 6.5 kV pn-diodes.

Interfacial Chemical Reactions Between MoS2 Lubricants and Bearing Materials

1988 ◽  
Vol 140 ◽  
Author(s):  
J.S. Zabinski ◽  
B.J. Tatarchuk
Keyword(s):  
High Temperature ◽  
Single Crystals ◽  
Basal Plane ◽  
Iron Sulfide ◽  
Vacuum Annealing ◽  
High Temperature Annealing ◽  
Iron Sulfides ◽  
X Ray ◽  
Bearing Materials ◽  
Excess Sulfur

AbstractX-ray Photoelectron.pectroscopy (XPS) and Conversion Electron M6ssbauer bpectroscopy (CEMS) were used to examine iron that was deposited on the basal plane of MoS2 single crystals and subjected to vacuum annealing, oxidizing, and reducing environments. Iron either intercalated into the MoS2 structure or formed oriented iron sulfides depending on the level of excess sulfur in the MoS2 structure. CEMS data demonstrated that iron sulfide crystal structures preferentially aligned with respect to theMoS2 basal plane and that alignment, and potentially adhesion, could be variedby appropriate high temperature annealing procedures.

Defect reduction in oxygen implanted silicon-on-insulator material during high-temperature annealing

1989 ◽  
Vol 47 ◽  
pp. 604-605
Author(s):  
P. Roitman ◽  
B. Cordts ◽  
S. Visitserngtrakul ◽  
S.J. Krause
Keyword(s):  
High Temperature ◽  
Annealing Temperature ◽  
Silicon On Insulator ◽  
High Dose ◽  
High Temperature Annealing ◽  
High Current ◽  
Defect Reduction ◽  
Annealing Step ◽  
Multiple Cycle ◽  
Defect Densities

Synthesis of a thin, buried dielectric layer to form a silicon-on-insulator (SOI) material by high dose oxygen implantation (SIMOX – Separation by IMplanted Oxygen) is becoming an important technology due to the advent of high current (200 mA) oxygen implanters. Recently, reductions in defect densities from 109 cm−2 down to 107 cm−2 or less have been reported. They were achieved with a final high temperature annealing step (1300°C – 1400°C) in conjunction with: a) high temperature implantation or; b) channeling implantation or; c) multiple cycle implantation. However, the processes and conditions for reduction and elimination of precipitates and defects during high temperature annealing are not well understood. In this work we have studied the effect of annealing temperature on defect and precipitate reduction for SIMOX samples which were processed first with high temperature, high current implantation followed by high temperature annealing.

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