Characteristics of Various Photodiode Structures in CMOS Technology with Monolithic Signal Processing Electronics

2011 ◽  
Author(s):  
Sourav Mukhopadhyay ◽  
V. B. Chandratre ◽  
Menka Sukhwani ◽  
C. K. Pithawa ◽  
P. Predeep ◽  
...  
Keyword(s):  
Signal Processing ◽  
Cmos Technology ◽  
Signal Processing Electronics

A Proposed Correlator Backend for the Culgoora Radioheliograph

1979 ◽  
Vol 3 (6) ◽  
pp. 371-375 ◽  
Author(s):  
D. J. McLean ◽  
M. Beard ◽  
A. Bos
Keyword(s):  
Signal Processing ◽  
Radio Telescope ◽  
Integrated Circuit ◽  
Digital Technology ◽  
Cosmic Radio ◽  
Original Signal ◽  
Radio Observations ◽  
Signal Processing Electronics ◽  
Digital Integrated Circuit

The Culgoora radioheliograph was designed in the early 1960s and commissioned in 1967. Since then there have been dramatic increases in the speed and versatility of digital integrated-circuit devices, and also a marked fall in their cost. It is now possible to replace the original signal processing electronics with equipment, based on modern digital technology, which will significantly enhance the performance of this radio telescope for solar and cosmic radio observations at metre wavelengths.

scholarly journals Current Controlled Differential Difference Current Conveyor Transconductance Amplifier and Its Application as Wave Active Filter

2013 ◽  
Vol 2013 ◽  
pp. 1-11 ◽  
Author(s):  
Neeta Pandey ◽  
Praveen Kumar ◽  
Jaya Choudhary
Keyword(s):  
Signal Processing ◽  
Cutoff Frequency ◽  
Cmos Technology ◽  
Bias Current ◽  
Active Filter ◽  
Current Conveyor ◽  
Third Order ◽  
Transconductance Amplifier ◽  
Wave Filter ◽  
Order Butterworth Filter

This paper proposes current controlled differential difference current conveyor transconductance amplifier (CCDDCCTA), a new active building block for analog signal processing. The functionality of the proposed block is verified via SPICE simulations using 0.25 μm TSMC CMOS technology parameters. The usefulness of the proposed element is demonstrated through an application, namely, wave filter. The CCDDCCTA-based wave equivalents are developed which use grounded capacitors and do not employ any resistors. The flexibility of terminal characteristics is utilized to suggest an alternate wave equivalents realization scheme which results in compact realization of wave filter. The feasibility of CCDDCCTA-based wave active filter is confirmed through simulation of a third-order Butterworth filter. The filter cutoff frequency can be tuned electronically via bias current.

scholarly journals Thermal noise limit for ultra-high vacuum noncontact atomic force microscopy

2013 ◽  
Vol 4 ◽  
pp. 32-44 ◽  
Author(s):  
Jannis Lübbe ◽  
Matthias Temmen ◽  
Sebastian Rode ◽  
Philipp Rahe ◽  
Angelika Kühnle ◽  
...  
Keyword(s):  
Atomic Force Microscopy ◽  
Signal Processing ◽  
Transfer Function ◽  
Spectral Density ◽  
Thermal Noise ◽  
Noise Spectral Density ◽  
Force Microscopy ◽  
Atomic Force ◽  
Noise Limit ◽  
Signal Processing Electronics

The noise of the frequency-shift signal Δf in noncontact atomic force microscopy (NC-AFM) consists of cantilever thermal noise, tip–surface-interaction noise and instrumental noise from the detection and signal processing systems. We investigate how the displacement-noise spectral density d z at the input of the frequency demodulator propagates to the frequency-shift-noise spectral density d Δ f at the demodulator output in dependence of cantilever properties and settings of the signal processing electronics in the limit of a negligible tip–surface interaction and a measurement under ultrahigh-vacuum conditions. For a quantification of the noise figures, we calibrate the cantilever displacement signal and determine the transfer function of the signal-processing electronics. From the transfer function and the measured d z , we predict d Δ f for specific filter settings, a given level of detection-system noise spectral density d z ds and the cantilever-thermal-noise spectral density d z th. We find an excellent agreement between the calculated and measured values for d Δ f . Furthermore, we demonstrate that thermal noise in d Δ f , defining the ultimate limit in NC-AFM signal detection, can be kept low by a proper choice of the cantilever whereby its Q-factor should be given most attention. A system with a low-noise signal detection and a suitable cantilever, operated with appropriate filter and feedback-loop settings allows room temperature NC-AFM measurements at a low thermal-noise limit with a significant bandwidth.

scholarly journals Recent developments in high-resolution-gamma-ray cargo-inspection technology

2018 ◽  
Vol 48 ◽  
pp. 1860109
Author(s):  
David Taylor ◽  
Victor Orphan ◽  
Eric Ackermann ◽  
Rhett Barnes ◽  
Ryan Shyffer ◽  
...  
Keyword(s):  
Signal Processing ◽  
High Resolution ◽  
Homeland Security ◽  
Gamma Ray ◽  
Imaging System ◽  
Digital Signal ◽  
Department Of Homeland Security ◽  
Legacy System ◽  
Cargo Inspection ◽  
Signal Processing Electronics

Under US Department of Homeland Security sponsorship, Spectral Labs Incorporated has developed a prototype high-resolution retrofit for an existing mobile VACIS, named the High-Resolution Imaging System (HiRIS). The legacy 256 NaI detectors in the VACIS detector column were replaced with 576 CsI detectors, more than doubling the pixel count. Using SiPMs to replace conventional PMTs allowed the packing of more detectors in the same VACIS detector enclosure. Legacy analog signal-processing electronics were replaced with advanced digital signal-processing electronics. Replacing gross counting in the legacy system with multichannel analysis of the counts from each detector will allow better control of detector crosstalk. The HiRIS detector modules were installed on a VACIS truck refurbished to as-new condition. Initial testing of the HiRIS prototype demonstrates enhanced spatial resolution by a factor of two as compared to the legacy system, without any degradation in throughput capability (20 containers per hour).

Front end and signal processing electronics for large detectors

1989 ◽  
Vol 36 (1) ◽  
pp. 446-457 ◽  
Author(s):  
L. Callewaert ◽  
W. Eyckmans ◽  
W. Sansen ◽  
V. Budihartono ◽  
F.M. Newcomer ◽  
...  
Keyword(s):  
Signal Processing ◽  
Front End ◽  
Signal Processing Electronics

Low-Power and Area-Efficient Parallel Multiplier Design Using Two-Dimensional Bypassing

2016 ◽  
Vol 26 (02) ◽  
pp. 1750030 ◽  
Author(s):  
Pankaj Kumar ◽  
Rajender Kumar Sharma
Keyword(s):  
Signal Processing ◽  
Low Power ◽  
High Speed ◽  
Digital Signal ◽  
Cmos Technology ◽  
Two Dimensional ◽  
Efficient Design ◽  
Parallel Multiplier ◽  
Power Delay Product ◽  
Area Efficient

To develop low-power, high-speed and area-efficient design for portable electronics devices and signal processing applications is a very challenging task. Multiplier has an important role in digital signal processing. Reducing the power consumption of multiplier will bring significant power reduction and other associated advantages in the overall digital system. In this paper, a low-power and area-efficient two-dimensional bypassing multiplier is presented. In two-dimensional bypassing, row and column are bypassed and thus the switching power is saved. Simulation results are realized using UMC 90[Formula: see text]nm CMOS technology and 0.9[Formula: see text]V, with Cadence Spectre simulation tool. The proposed architecture is compared with the existing multiplier architectures, i.e., Braun’s multiplier, row bypassing multiplier, column bypassing multiplier and row and column bypassing multiplier. Performance parameters of the proposed multiplier are better than the existing multipliers in terms of area occupation, power dissipation and power-delay product. These results are obtained for randomly generated input test patterns having uniform distribution probability.

scholarly journals Editor’s Column

2019 ◽  
Vol 23 (2) ◽  
Author(s):  
Mladen Knezic
Keyword(s):  
Signal Processing ◽  
Power Dissipation ◽  
Audio Signal ◽  
Cmos Technology ◽  
Power Grids ◽  
Audio Signal Processing ◽  
Domino Logic ◽  
December Issue ◽  
Simulation Results ◽  
And Control

THE December issue of Electronics journal in 2019 contains five regular papers that present recent advancements in the field of electronics, audio signal processing and control theory applied to power grids balancing. The paper “A Novel Domino Logic with Modified Keeper in 16nm CMOS Technology”, authored by S. Singhal, A. Mehra, and U. Tripathi, proposes a novel domino logic aimed at improving the power dissipation and reducing consumed area of the circuit. A comparison with previous techniques is provided in the paper as well as simulation results obtained using Ngspice simulator.

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