Kinetics of platinum silicide formation during rapid thermal processing

1992 ◽  
Vol 72 (5) ◽  
pp. 1833-1836 ◽  
Author(s):  
A. K. Pant ◽  
S. P. Murarka ◽  
C. Shepard ◽  
W. Lanford
1989 ◽  
Vol 333 (4-5) ◽  
pp. 569-575 ◽  
Author(s):  
W. Pamler ◽  
K. Wangemann ◽  
W. Bensch ◽  
E. Bußmann ◽  
A. Mitwalsky

2002 ◽  
Vol 745 ◽  
Author(s):  
Erik Haralson ◽  
Tobias Jarmar ◽  
Johan Seger ◽  
Henry H. Radamson ◽  
Shi-Li Zhang ◽  
...  

ABSTRACTThe reactions of Ni with polycrystalline Si, Si0.82Ge0.18 and Si0.818Ge0.18C0.002 films in two different configurations during rapid thermal processing were studied. For the usually studied planar configuration with 20 nm thick Ni on 130–290 nm thick Si1-x-yGexCy, NiSi1-xGex(C) forms at 450°C on either Si0.82Ge0.18 or Si0.818Ge0.18C0.002, comparable to NiSi formed on Si. However, the agglomeration of NiSi1-xGex(C) on Si0.818Ge0.18C0.002 occurs at 625°C, about 50°C higher than that of NiSi1-xGex on Si0.82Ge0.18. For thin-film lateral diffusion couples, a 200-nm thick Ni film was in contact with 80–130 nm thick Si1-x-yGexCy through 1–10 μm sized contact openings in a 170 nm thick SiO2 isolation. While the Ni3Si phase was formed for both the Si0.82Ge0.18 and Si0.818Ge0.18C0.002 samples, the presence of 0.2 at.% C caused a slightly slower lateral growth.


1993 ◽  
Vol 63 (1-4) ◽  
pp. 131-134 ◽  
Author(s):  
J.-M. Dilhac ◽  
C. Ganibal ◽  
N. Nolhier ◽  
P.B. Moynagh ◽  
C.P. Chew ◽  
...  

2000 ◽  
Vol 647 ◽  
Author(s):  
Sabina Spiga ◽  
Sandro Ferrari ◽  
Marco Fanciulli ◽  
Bernd Schmidt ◽  
Karl-Heinz Heinig ◽  
...  

AbstractIn this work we investigate the ion beam synthesis of Sn and Sb clusters in thin oxides. 80 keV (fluences of 0.1-1 × 1016 cm−2) Sn implantation in 85 nm thick SiO2, followed by annealing (800-1000°C for 30-300 sec under Ar or N 2 dry ambient) in a rapid thermal processing (RTP) system, leads to the formation of two cluster bands, near the middle of the SiO2 layer and the Si/SiO2 interface. In addition, big isolated clusters are randomly distributed between the two bands. Cluster-size distribution and cluster-crystallinity are related to implantation fluence and annealing time. Low energy (10-12 keV) Sb and Sn implantation (fluences 2-5 × 1015 cm−2) leads to the formation of very uniform cluster-size distribution. Under specific process conditions, only an interface cluster band is observed.


2011 ◽  
Vol 98 (8) ◽  
pp. 082102 ◽  
Author(s):  
Erik J. Faber ◽  
Rob A. M. Wolters ◽  
Jurriaan Schmitz

1987 ◽  
Vol 92 ◽  
Author(s):  
J. Nulman

ABSTRACTThe in-situ processing of silicon dielectrics by rapid thermal processing (RTP) is described. RTP includes here three basic sequentially performed processes: wafer cleaning, oxidation and annealing. The insitu cleaning allows for reduction of chemical and native oxides and silicon surface chemical polish, resulting in interface density of states as low as 5×l09 cm-2eV-1. Kinetics of oxide growth indicates an activation energy of 1.4 eV for the initial linear oxidation rate.


1996 ◽  
Vol 11 (2) ◽  
pp. 412-421 ◽  
Author(s):  
A. V. Amorsolo ◽  
P. D. Funkenbusch ◽  
A. M. Kadin

A parametric study of titanium silicide formation by rapid thermal processing was conducted to determine the effects of annealing temperature (650 °C, 750 °C), annealing time (30 s, 60 s), wet etching (no HF dip, with HF dip), sputter etching (no sputter etch, with sputter etch), and annealing ambient (Ar, N2) on the completeness of conversion of 60 nm Ti on (111)-Si to C54–TiSi2 based on sheet resistance and the uniformity of the sheet resistance measurements across the entire wafer. Statistical analysis of the results showed that temperature, annealing ambient, and sputter etching had the greatest influence. Increasing the temperature and using argon gas instead of nitrogen promoted conversion of the film to C54–TiSi2. On the other hand, sputter etching retarded it. The results also indicated significant interactions among these factors. The best uniformity in sheet resistance was obtained by annealing at 750 °C without sputter etching. The different sheet resistance profiles showed gradients that were consistent with expected profile behaviors, arising from temperature variations across the wafer due to the effect of a flowing cold gas and the effects of the wafer edge and flats.


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