A new self‐aligned subtractive gate process for high‐voltage and complementary polycrystalline silicon thin‐film transistors
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2009 ◽
Vol 48
(5)
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pp. 052402
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2016 ◽
Vol 63
(10)
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pp. 3964-3970
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2010 ◽
Vol 49
(3)
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pp. 03CD03
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2007 ◽
Vol 46
(7A)
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pp. 4021-4027
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1989 ◽
Vol 115
(1-3)
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pp. 141-143
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