Nanoscale resistive memory with intrinsic diode characteristics and long endurance

2010 ◽  
Vol 96 (5) ◽  
pp. 053106 ◽  
Author(s):  
Kuk-Hwan Kim ◽  
Sung Hyun Jo ◽  
Siddharth Gaba ◽  
Wei Lu
Keyword(s):  
Resistive Memory ◽  
Long Endurance

Long-Endurance Nanocrystal $\hbox{TiO}_{2}$ Resistive Memory Using a TaON Buffer Layer

2011 ◽  
Vol 32 (12) ◽  
pp. 1749-1751 ◽  
Author(s):  
C. H. Cheng ◽  
P. C. Chen ◽  
Y. H. Wu ◽  
F. S. Yeh ◽  
Albert Chin
Keyword(s):  
Buffer Layer ◽  
Resistive Memory ◽  
Long Endurance

Soft ionic liquid based resistive memory characteristics in a two terminal discrete polydimethylsiloxane cylindrical microchannel

2020 ◽  
Vol 8 (38) ◽  
pp. 13368-13374
Author(s):  
Muhammad Umair Khan ◽  
Gul Hassan ◽  
Jinho Bae
Keyword(s):  
Ionic Liquid ◽  
Acrylic Acid ◽  
Sodium Hydroxide ◽  
Sodium Salt ◽  
Resistive Memory ◽  
Cylindrical Microchannel ◽  
Memory Characteristics ◽  
Poly Acrylic Acid

This paper proposes a novel soft ionic liquid (IL) electrically functional device that displays resistive memory characteristics using poly(acrylic acid) partial sodium salt (PAA-Na+:H2O) solution gel and sodium hydroxide (NaOH) in a thin polydimethylsiloxane (PDMS) cylindrical microchannel.

Room-temperature fabricated, fully transparent resistive memory based on ITO/CeO2/ITO structure for RRAM applications

2015 ◽  
Vol 202 ◽  
pp. 28-34 ◽  
Author(s):  
Muhammad Ismail ◽  
Anwar Manzoor Rana ◽  
Ijaz Talib ◽  
Tsung-Ling Tsai ◽  
Umesh Chand ◽  
...  
Keyword(s):  
Room Temperature ◽  
Resistive Memory

Highly Thermal Stable Polyimides Applied in Flexible Resistive Memory

2021 ◽  
pp. 2100512
Author(s):  
Jyun‐Yu Gao ◽  
Chun‐Kai Chen ◽  
Yan‐Cheng Lin ◽  
Chi‐Ching Kuo ◽  
Wen‐Chang Chen
Keyword(s):  
Resistive Memory ◽  
Thermal Stable

scholarly journals Nonvolatile Ternary Resistive Memory Performance of a Benzothiadiazole-Based Donor–Acceptor Material on ITO-Coated Glass

Coatings ◽  
2021 ◽  
Vol 11 (3) ◽  
pp. 318
Author(s):  
Yang Li ◽  
Cheng Zhang ◽  
Zhiming Shi ◽  
Jingni Li ◽  
Qingyun Qian ◽  
...  
Keyword(s):  
Data Storage ◽  
High Performance ◽  
Memory Performance ◽  
Resistive Memory ◽  
Molecular Systems ◽  
Threshold Voltages ◽  
Donor Acceptor ◽  
Low Threshold ◽  
Multilevel Memory ◽  
Further Development

The explosive growth of data and information has increasingly motivated scientific and technological endeavors toward ultra-high-density data storage (UHDDS) applications. Herein, a donor−acceptor (D–A) type small conjugated molecule containing benzothiadiazole (BT) is prepared (NIBTCN), which demonstrates multilevel resistive memory behavior and holds considerable promise for implementing the target of UHDDS. The as-prepared device presents distinct current ratios of 105.2/103.2/1, low threshold voltages of −1.90 V and −3.85 V, and satisfactory reproducibility beyond 60%, which suggests reliable device performance. This work represents a favorable step toward further development of highly-efficient D−A molecular systems, which opens more opportunities for achieving high performance multilevel memory materials and devices.

scholarly journals Ratio-based multi-level resistive memory cells

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Miguel Angel Lastras-Montaño ◽  
Osvaldo Del Pozo-Zamudio ◽  
Lev Glebsky ◽  
Meiran Zhao ◽  
Huaqiang Wu ◽  
...  
Keyword(s):  
Error Probability ◽  
Resistance Switching ◽  
Closed Form Expression ◽  
Memory Cells ◽  
Resistive Memory ◽  
Worst Case ◽  
Information Encoding ◽  
Bit Error Probability ◽  
Multi Level ◽  
Switching Devices

AbstractRatio-based encoding has recently been proposed for single-level resistive memory cells, in which the resistance ratio of a pair of resistance-switching devices, rather than the resistance of a single device (i.e. resistance-based encoding), is used for encoding single-bit information, which significantly reduces the bit error probability. Generalizing this concept for multi-level cells, we propose a ratio-based information encoding mechanism and demonstrate its advantages over the resistance-based encoding for designing multi-level memory systems. We derive a closed-form expression for the bit error probability of ratio-based and resistance-based encodings as a function of the number of levels of the memory cell, the variance of the distribution of the resistive states, and the ON/OFF ratio of the resistive device, from which we prove that for a multi-level memory system using resistance-based encoding with bit error probability x, its corresponding bit error probability using ratio-based encoding will be reduced to $$x^2$$ x 2 at the best case and $$x^{\sqrt{2}}$$ x 2 at the worst case. We experimentally validated these findings on multiple resistance-switching devices and show that, compared to the resistance-based encoding on the same resistive devices, our approach achieves up to 3 orders of magnitude lower bit error probability, or alternatively it could reduce the cell’s programming time and programming energy by up 5–10$$\times$$ × , while achieving the same bit error probability.

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