Device physics and design of germanium tunneling field-effect transistor with source and drain engineering for low power and high performance applications

2008 ◽  
Vol 103 (10) ◽  
pp. 104504 ◽  
Author(s):  
Eng-Huat Toh ◽  
Grace Huiqi Wang ◽  
Ganesh Samudra ◽  
Yee-Chia Yeo
Keyword(s):  
Low Power ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
Device Physics ◽  
Effect Transistor

scholarly journals Low Power based Dynamic TSPC D flip flop for High Performance Applications

2020 ◽  
Vol 9 (8) ◽  
pp. 758-762
Keyword(s):  
Low Power ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
Memory Cell ◽  
Research Center ◽  
Short Channel ◽  
Flip Flop ◽  
Force Application ◽  
Effect Transistor

D flip-flop is viewed as the most basic memory cell in by far most of computerized circuits, which brings it broad usage, particularly under current conditions where high-thickness pipeline innovation is as often as possible utilized in advanced coordinated circuits and flip-flop modules are key segments. As a constant research center, various sorts of zero flip-flops have been concocted and explored, and the ongoing exploration pattern has gone to rapid low-control execution, which can be come down to low power-defer item. To actualize superior VLSI, picking the most proper D flip-flop has clearly become an incredibly huge part in the structure stream. The quick headway in semiconductor innovation made it practicable to coordinate entire electronic framework on a solitary chip. CMOS innovation is the most doable semiconductor innovation yet it neglects to proceed according to desires past and at 32nm innovation hub because of the short channel impacts. GNRFET is Graphene Nano Ribbon Field Effect Transistor, it is seen that GNRFET is a promising substitute for low force application for its better grasp over the channel. In this paper, an audit on Dynamic Flip Flop and GNRFET is introduced. The power is improved in the proposed circuit for the D flip flop TSPC.

Optimal design for a high performance H-JLTFET using HfO2 as a gate dielectric for ultra low power applications

RSC Advances ◽  
2014 ◽  
Vol 4 (43) ◽  
pp. 22803-22807 ◽  
Author(s):  
Pranav Kumar Asthana ◽  
Bahniman Ghosh ◽  
Shiromani Bal Mukund Rahi ◽  
Yogesh Goswami
Keyword(s):  
Optimal Design ◽  
Low Power ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
Gate Dielectric ◽  
Ultra Low Power ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor

In this paper we have proposed an optimal design for a hetero-junctionless tunnel field effect transistor using HfO2 as a gate dielectric.

Low Power Design Techniques

2016 ◽  
pp. 1-26
Author(s):  
Mohd Samar Ansari ◽  
Shailendra Kumar Tripathi
Keyword(s):  
Low Power ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
Short Circuit ◽  
Physical Constraints ◽  
Nanoelectronic Devices ◽  
Technological Barriers ◽  
Effect Transistor ◽  
Power Circuits

Conventional CMOS based IC implementations are soon expected to attain a state of saturation mainly due to technological barriers and physical constraints. A number of nanoelectronic devices that may be viable alternatives to standard CMOS have been put forward, and these could pave way for even lower power circuits. Some worthy contenders are carbon nanotube field effect transistor, nanowire field effect transistor, tunnel field effect transistor, and the single electron transistor. In this chapter, device- and circuit-level techniques have been discussed for designing low power circuits in conventional CMOS. Moreover, various sources of power consumption have been reviewed. It is also attempted to review the major components of power i.e. dynamic, short-circuit, and leakage, followed by basics of device and circuit level techniques to reduce the power components. Further, pertinent features of emerging nanoelectronic devices are discussed. These beyond-CMOS devices are expected to revolutionize the era of electronic systems with their low power & high performance characteristics.

scholarly journals Ab initio perspective of ultra-scaled CMOS from 2D-material fundamentals to dynamically doped transistors

2021 ◽  
Vol 5 (1) ◽  
Author(s):  
Aryan Afzalian
Keyword(s):  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
High Mobility ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Grand Challenge ◽  
Gate Length ◽  
Delay Performance ◽  
Effect Transistor

AbstractUsing accurate dissipative DFT-NEGF atomistic-simulation techniques within the Wannier-Function formalism, we give a fresh look at the possibility of sub-10-nm scaling for high-performance complementary metal oxide semiconductor (CMOS) applications. We show that a combination of good electrostatic control together with high mobility is paramount to meet the stringent roadmap targets. Such requirements typically play against each other at sub-10-nm gate length for MOS transistors made of conventional semiconductor materials like Si, Ge, or III–V and dimensional scaling is expected to end ~12 nm gate-length (pitch of 40 nm). We demonstrate that using alternative 2D channel materials, such as the less-explored HfS2 or ZrS2, high-drive current down to ~6 nm is, however, achievable. We also propose a dynamically doped field-effect transistor concept, that scales better than its MOSFET counterpart. Used in combination with a high-mobility material such as HfS2, it allows for keeping the stringent high-performance CMOS on current and competitive energy-delay performance, when scaling down to virtually 0 nm gate length using a single-gate architecture and an ultra-compact design (pitch of 22 nm). The dynamically doped field-effect transistor further addresses the grand-challenge of doping in ultra-scaled devices and 2D materials in particular.

scholarly journals Gold Nanoparticle-Mediated Noncovalent Functionalization of Graphene for Field-Effect Transistor

2021 ◽  
Author(s):  
Dongha Shin ◽  
Hwa Rang Kim ◽  
Byung Hee Hong
Keyword(s):  
Transport Properties ◽  
Gold Nanoparticle ◽  
Electrical Transport ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
Electrical Transport Properties ◽  
Noncovalent Functionalization ◽  
Effect Transistor

Since of its first discovery, graphene has attracted much attention because of the unique electrical transport properties that can be applied to high-performance field-effect transistor (FET). However, mounting chemical functionalities...

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