Single-step fabrication of Fresnel microlens array on sapphire substrate of flip-chip gallium nitride light emitting diode by focused ion beam

2007 ◽  
Vol 91 (5) ◽  
pp. 051111 ◽  
Author(s):  
Ming-Kwei Lee ◽  
Kwei-Kuan Kuo
Keyword(s):  
Gallium Nitride ◽  
Sapphire Substrate ◽  
Flip Chip ◽  
Focused Ion Beam ◽  
Light Emitting Diode ◽  
Ion Beam ◽  
Microlens Array ◽  
Single Step ◽  
Light Emitting

Failure Mechanisms of Contact Vias in Organic Light Emitting Diode Displays

2004 ◽  
Author(s):  
T.D. Lowes ◽  
L. Wu ◽  
K. Eden ◽  
J. Trujillo
Keyword(s):  
Focused Ion Beam ◽  
Light Emitting Diode ◽  
Ion Beam ◽  
Electrical Performance ◽  
Ion Beam Etching ◽  
Light Emitting ◽  
Organic Light Emitting Diode ◽  
Root Cause ◽  
Organic Light ◽  
Secondary Ion

Abstract A new via interconnect failure mode found in organic light emitting diode (OLED) displays has been documented. Physical appearance, electrical performance, response to environmental stresses and root cause analyses have been studied using both simplistic and sophisticated failure analysis tools including focused ion beam etching and time of flight secondary ion mass spectroscopy (TOF-SIMS).

Focused Ion Beam Analysis of Low-K Dielectrics

2000 ◽  
Author(s):  
H. J. Bender ◽  
R. A. Donaton
Keyword(s):  
Electron Microscope ◽  
Cross Section ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Single Step ◽  
Specimen Preparation ◽  
Transmission Electron ◽  
Beam Analysis ◽  
Low K ◽  
Scanning Electron

Abstract The characteristics of an organic low-k dielectric during investigation by focused ion beam (FIB) are discussed for the different FIB application modes: cross-section imaging, specimen preparation for transmission electron microscopy, and via milling for device modification. It is shown that the material is more stable under the ion beam than under the electron beam in the scanning electron microscope (SEM) or in the transmission electron microscope (TEM). The milling of the material by H2O vapor assistance is strongly enhanced. Also by applying XeF2 etching an enhanced milling rate can be obtained so that both the polymer layer and the intermediate oxides can be etched in a single step.

Manufacturing In-Line Whole Wafer Focused Ion Beam (FIB) Memory Address Descramble Verification

2008 ◽  
Author(s):  
Steven B. Herschbein ◽  
Hyoung H. Kang ◽  
Scott L. Jansen ◽  
Andrew S. Dalton
Keyword(s):  
Flip Chip ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Random Access ◽  
Cell Counting ◽  
Test Results ◽  
Laboratory Procedure ◽  
Memory Array ◽  
Dual Beam ◽  
Process Level

Abstract Test engineers and failure analyst familiar with random access memory arrays have probably encountered the frustration of dealing with address descrambling. The resulting nonsequential internal bit cell counting scheme often means that the location of the failing cell under investigation is nowhere near where it is expected to be. A logical to physical algorithm for decoding the standard library block might have been provided with the design, but is it still correct now that the array has been halved and inverted to fit the available space in a new processor chip? Off-line labs have traditionally been tasked with array layout verification. In the past, hard and soft failures could be induced on the frontside of finished product, then bitmapped to see if the sites were in agreement. As density tightened, flip-chip FIB techniques to induce a pattern of hard fails on packaged devices came into practice. While the backside FIB edit method is effective, it is complex and expensive. The installation of an in-line Dual Beam FIB created new opportunities to move FA tasks out of the lab and into the FAB. Using a new edit procedure, selected wafers have an extensive pattern of defects 'written' directly into the memory array at an early process level. Bitmapping of the RAM blocks upon wafer completion is then used to verify correlation between the physical damaged cells and the logical sites called out in the test results. This early feedback in-line methodology has worked so well that it has almost entirely displaced the complex laboratory procedure of backside FIB memory array descramble verification.

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