Short-channel polymer field-effect-transistor fabrication using spin-coating-induced edge template and ink-jet printing

2005 ◽  
Vol 87 (23) ◽  
pp. 232111 ◽  
Author(s):  
S. P. Li ◽  
D. P. Chu ◽  
C. J. Newsome ◽  
D. M. Russell ◽  
T. Kugler ◽  
...  
2020 ◽  
Vol 18 (6) ◽  
pp. 468-476
Author(s):  
Prateek Kumar ◽  
Maneesha Gupta ◽  
Naveen Kumar ◽  
Marlon D. Cruz ◽  
Hemant Singh ◽  
...  

With technology invading nanometer regime performance of the Metal-Oxide-semiconductor Field Effect Transistor is largely hampered by short channel effects. Most of the simulation tools available do not include short channel effects and quantum effects in the analysis which raises doubt on their authenticity. Although researchers have tried to provide an alternative in the form of tunnel field-effect transistors, junction-less transistors, etc. but they all suffer from their own set of problems. Therefore, Metal-Oxide-Semiconductor Field-Effect Transistor remains the backbone of the VLSI industry. This work is dedicated to the design and study of the novel tub-type Metal-Oxide-Semiconductor Field-Effect Transistor. For simulation Non-Equilibrium Green’s Function is used as the primary model of simulation. The device is analyzed under different physical variations like work function, permittivity, and interface trap charge. This work uses Silicon-Molybdenum Disulphide heterojunction and Silicon-Tungsten Disulphide heterojunction as channel material. Results for both the heterojunctions are compared. It was analyzed that Silicon-Molybdenum Disulphide heterojunction provides better linearity and Silicon-Tungsten Disulphide heterojunction provides better switching speed than conventional Metal-Oxide-Semiconductor Field-Effect Transistor.


D flip-flop is viewed as the most basic memory cell in by far most of computerized circuits, which brings it broad usage, particularly under current conditions where high-thickness pipeline innovation is as often as possible utilized in advanced coordinated circuits and flip-flop modules are key segments. As a constant research center, various sorts of zero flip-flops have been concocted and explored, and the ongoing exploration pattern has gone to rapid low-control execution, which can be come down to low power-defer item. To actualize superior VLSI, picking the most proper D flip-flop has clearly become an incredibly huge part in the structure stream. The quick headway in semiconductor innovation made it practicable to coordinate entire electronic framework on a solitary chip. CMOS innovation is the most doable semiconductor innovation yet it neglects to proceed according to desires past and at 32nm innovation hub because of the short channel impacts. GNRFET is Graphene Nano Ribbon Field Effect Transistor, it is seen that GNRFET is a promising substitute for low force application for its better grasp over the channel. In this paper, an audit on Dynamic Flip Flop and GNRFET is introduced. The power is improved in the proposed circuit for the D flip flop TSPC.


2018 ◽  
Vol 6 (29) ◽  
pp. 7750-7758 ◽  
Author(s):  
So-Ra Park ◽  
Ji-Ho Kang ◽  
Dong A Ahn ◽  
Min Chul Suh

A novel cross-linkable hole transport material (HTM) was used to form a robust layer structure upon continuous wet processes such as spin coating or ink-jet printing.


2020 ◽  
Vol 8 (43) ◽  
pp. 15312-15321
Author(s):  
Davide Blasi ◽  
Fabrizio Viola ◽  
Francesco Modena ◽  
Axel Luukkonen ◽  
Eleonora Macchia ◽  
...  

A large-area processable ink-jet-printed poly(3-hexylthiophene) electrolyte-gated field-effect transistor, designed for bioelectronic applications, is proven to be stable for one week of continuous operation.


2020 ◽  
Vol 59 (3) ◽  
pp. 034001
Author(s):  
Suyuan Wang ◽  
Qiang Wu ◽  
Jun Zheng ◽  
Bin Zhang ◽  
Jianghong Yao ◽  
...  

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