Address line-assisted switching of vertical magnetoresistive random access memory cells

2005 ◽  
Vol 97 (10) ◽  
pp. 10P504 ◽  
Author(s):  
John M. Anderson ◽  
David J. Brownell ◽  
Gary A. Prinz ◽  
Harold Huggins ◽  
Luan V. Van ◽  
...  
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Memory Cells ◽  
Access Memory ◽  
Magnetoresistive Random Access Memory ◽  
Address Line

Trimmed-diamond shaped toggle magnetoresistive random access memory cells

2009 ◽  
Vol 105 (7) ◽  
pp. 073916
Author(s):  
Y. Fukuma ◽  
H. Fujiwara ◽  
P. B. Visscher ◽  
G. J. Mankey
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Memory Cells ◽  
Access Memory ◽  
Magnetoresistive Random Access Memory

Integration of spin valves and GaAs diodes in magnetoresistive random access memory cells

1999 ◽  
Vol 85 (8) ◽  
pp. 4779-4781 ◽  
Author(s):  
H. Boeve ◽  
J. Das ◽  
C. Bruynseraede ◽  
J. De Boeck ◽  
G. Borghs
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Spin Valves ◽  
Memory Cells ◽  
Access Memory ◽  
Magnetoresistive Random Access Memory

Magnetoelectric Assisted 180° Magnetization Switching for Electric Field Addressable Writing in Magnetoresistive Random-Access Memory

ACS Nano ◽  
2014 ◽  
Vol 8 (8) ◽  
pp. 7793-7800 ◽  
Author(s):  
Zhiguang Wang ◽  
Yue Zhang ◽  
Yaojin Wang ◽  
Yanxi Li ◽  
Haosu Luo ◽  
...  
Keyword(s):  
Electric Field ◽  
Random Access ◽  
Random Access Memory ◽  
Access Memory ◽  
Magnetization Switching ◽  
Magnetoresistive Random Access Memory

Analysis of Grain Boundary Dependent Memory Characteristics in Poly-Si One-Transistor Dynamic Random-Access Memory

2021 ◽  
Vol 21 (8) ◽  
pp. 4216-4222
Author(s):  
Songyi Yoo ◽  
In-Man Kang ◽  
Sung-Jae Cho ◽  
Wookyung Sun ◽  
Hyungsoon Shin
Keyword(s):  
Strong Electric Field ◽  
Memory Performance ◽  
Random Access ◽  
Memory Cell ◽  
Random Access Memory ◽  
Dynamic Random Access Memory ◽  
Thin Body ◽  
Memory Cells ◽  
Access Memory ◽  
Memory Characteristics

A capacitorless one-transistor dynamic random-access memory cell with a polysilicon body (poly-Si 1T-DRAM) has a cost-effective fabrication process and allows a three-dimensional stacked architecture that increases the integration density of memory cells. Also, since this device uses grain boundaries (GBs) as a storage region, it can be operated as a memory cell even in a thin body device. GBs are important to the memory characteristics of poly-Si 1T-DRAM because the amount of trapped charge in the GBs determines the memory’s data state. In this paper, we report on a statistical analysis of the memory characteristics of poly-Si 1T-DRAM cells according to the number and location of GBs using TCAD simulation. As the number of GBs increases, the sensing margin and retention time of memory cells deteriorate due to increasing trapped electron charge. Also, “0” state current increases and memory performance degrades in cells where all GBs are adjacent to the source or drain junction side in a strong electric field. These results mean that in poly-Si 1T-DRAM design, the number and location of GBs in a channel should be considered for optimal memory performance.

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