Low temperature InP/Si wafer bonding

2004 ◽  
Vol 84 (5) ◽  
pp. 732-734 ◽  
Author(s):  
Q.-Y. Tong ◽  
Q. Gan ◽  
G. Hudson ◽  
G. Fountain ◽  
P. Enquist
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Si Wafer

Low-temperature Au–Si wafer bonding

2010 ◽  
Vol 20 (9) ◽  
pp. 095014 ◽  
Author(s):  
Errong Jing ◽  
Bin Xiong ◽  
Yuelin Wang
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Si Wafer

Low-temperature Si/Si wafer bonding using boride-treated surface

2009 ◽  
Author(s):  
Hailan Song ◽  
Hui Huang ◽  
Xiaomin Ren ◽  
Wenjuan Wang ◽  
Yongqing Huang
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Si Wafer

Low-temperature Au/Si wafer bonding

2010 ◽  
Vol 46 (16) ◽  
pp. 1143 ◽  
Author(s):  
E. Jing ◽  
B. Xiong ◽  
Y. Wang
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Si Wafer

Low-temperature Au/a-Si wafer bonding

2010 ◽  
Vol 21 (1) ◽  
pp. 015013 ◽  
Author(s):  
Errong Jing ◽  
Bin Xiong ◽  
Yuelin Wang
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Si Wafer

Effect of Free Radical Activation for Low Temperature Si to Si Wafer Bonding

2010 ◽  
Vol 157 (1) ◽  
pp. H109 ◽  
Author(s):  
K. Y. Byun ◽  
I. Ferain ◽  
C. Colinge
Keyword(s):  
Free Radical ◽  
Low Temperature ◽  
Wafer Bonding ◽  
Si Wafer

Low-temperature Si/Si Wafer Bonding Using Boride Treated Surface

2009 ◽  
Author(s):  
Hailan Song ◽  
Hui Huang ◽  
Xiaomin Ren ◽  
Wenjuan Wang ◽  
Yongqing Huang
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Si Wafer

Study on Crystallization Mechanism of GeSn Interlayer for Low Temperature Ge/Si Bonding

2021 ◽  
Author(s):  
Ziwei Wang ◽  
Ziqi Zhang ◽  
Donglin Huang ◽  
Shaoying Ke ◽  
Zongpei Li ◽  
...  
Keyword(s):  
Low Temperature ◽  
Integrated Circuits ◽  
Wafer Bonding ◽  
Photonic Integrated Circuits ◽  
High Strength ◽  
Activation Process ◽  
Low Temperature Bonding ◽  
Gesn Alloy ◽  
Interlayer Bonding ◽  
Si Wafer

Abstract Low temperature bonding technologies is necessary in next-generation photonic integrated circuits, such as flexible optoelectronic devices, low dark current Ge/Si devices and so on. Since Germanium-Tin (GeSn) alloy has lower crystallization temperature, in this work, amorphous GeSn with 5% Sn alloy by magnetron sputtering is introduced as an intermediate layer for wafer bonding innovatively. And high strength Ge/Si heterojunction with a crystal GeSn layer is realized without any surface activation process. Two mechanisms in the interlayer crystallization are put forward and substantiated experimentally and theoretically: 1) the a-GeSn turns to be poly-GeSn due to the induction of the c-Ge substrate. 2) Stress between Si wafer and interlayer due to thermal mismatch contributes to the crystallization. It is concluded that GeSn semiconductor interlayer bonding would be one of the potential technologies for bonding process.

Low temperature InP∕Si wafer bonding using boride treated surface

2007 ◽  
Vol 90 (16) ◽  
pp. 161102 ◽  
Author(s):  
Hui Huang ◽  
Xiaomin Ren ◽  
Wenjuan Wang ◽  
Hailan Song ◽  
Qi Wang ◽  
...  
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Si Wafer
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