scholarly journals Multipeak negative-differential-resistance device by combining single-electron and metal–oxide–semiconductor transistors

2001 ◽  
Vol 79 (22) ◽  
pp. 3618-3620 ◽  
Author(s):  
Hiroshi Inokawa ◽  
Akira Fujiwara ◽  
Yasuo Takahashi
Keyword(s):  
Metal Oxide ◽  
Negative Differential Resistance ◽  
Differential Resistance ◽  
Metal Oxide Semiconductor ◽  
Single Electron ◽  
Oxide Semiconductor

Design of Quaternary Half Adder Using Hybrid SETMOS Cell

2011 ◽  
Vol 110-116 ◽  
pp. 5085-5089
Author(s):  
Khadijeh Feizi ◽  
Ali Shahhoseini
Keyword(s):  
Metal Oxide ◽  
Logic Gates ◽  
Metal Oxide Semiconductor ◽  
Single Electron ◽  
Oxide Semiconductor ◽  
Single Electron Transistor ◽  
Mos Transistor ◽  
Logic Operation ◽  
Half Adder ◽  
Arithmetic Units

Adder is one of the important arithmetic units in computers. In this paper, we investigate the implementation of quaternary half adder based on multiple-valued (MV) logic gates using single electron transistor (SET) and metal-oxide-semiconductor (MOS) transistor. We use hybrid SETMOS universal literal gate which has been proposed by Mahapatra and Ionesco. We apply two 4-radix inputs to the proposed quaternary half adder and obtain sum and carry outputs. The logic operation of the proposed quaternary half adder is verified by using HSPICE simulator. Moreover we compare the performance of our proposed quaternary half adder with the performance of a quaternary half adder based on MOS technology.

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