scholarly journals Erratum: “A room-temperature silicon single-electron metal–oxide–semiconductor memory with nanoscale floating-gate and ultranarrow channel” [Appl. Phys. Lett. 70, 850 (1997)]

1997 ◽  
Vol 71 (4) ◽  
pp. 558-558
Author(s):  
Lingjie Guo ◽  
Effendi Leobandung ◽  
Stephen Y. Chou
Keyword(s):  
Metal Oxide ◽  
Room Temperature ◽  
Metal Oxide Semiconductor ◽  
Floating Gate ◽  
Single Electron ◽  
Oxide Semiconductor ◽  
Semiconductor Memory

Characterization of HfO2/Si Exposed to Water Vapor at Room Temperature

2006 ◽  
Vol 917 ◽  
Author(s):  
Carlos Driemeier ◽  
Elizandra Martinazzi ◽  
Israel J. R. Baumvol ◽  
Evgeni Gusev
Keyword(s):  
Water Vapor ◽  
Metal Oxide ◽  
Room Temperature ◽  
Gate Dielectric ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Dielectric Films ◽  
Nuclear Reaction Analysis ◽  
Environmental Air

AbstractHfO2-based materials are the leading candidates to replace SiO2 as the gate dielectric in Si-based metal-oxide-semiconductor filed-effect transistors. The ubiquitous presence of water vapor in the environments to which the dielectric films are exposed (e.g. in environmental air) leads to questions about how water could affect the properties of the dielectric/Si structures. In order to investigate this topic, HfO2/SiO2/Si(001) thin film structures were exposed at room temperature to water vapor isotopically enriched in 2H and 18O followed by quantification and profiling of these nuclides by nuclear reaction analysis. We showed i) the formation of strongly bonded hydroxyls at the HfO2 surface; ii) room temperature migration of oxygen and water-derived oxygenous species through the HfO2 films, indicating that HfO2 is a weak diffusion barrier for these oxidizing species; iii) hydrogenous, water-derived species attachment to the SiO2 interlayer, resulting in detrimental hydrogenous defects therein. Consequences of these results to HfO2-based metal-oxide-semiconductor devices are discussed.

On the methodology of calculating volume charge density in a MIFGMOS substrate using Poisson’s equation

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Francisco Javier Plascencia Jauregui ◽  
Agustín Santiago Medina Vazquez ◽  
Edwin Christian Becerra Alvarez ◽  
José Manuel Arce Zavala ◽  
Sandra Fabiola Flores Ruiz
Keyword(s):  
Metal Oxide ◽  
Charge Density ◽  
Metal Oxide Semiconductor ◽  
Floating Gate ◽  
Poisson’S Equation ◽  
Oxide Semiconductor ◽  
Volume Charge ◽  
Poisson's Equation ◽  
Content Type ◽  
Volume Charge Density

Purpose This study aims to present a mathematical method based on Poisson’s equation to calculate the voltage and volume charge density formed in the substrate under the floating gate area of a multiple-input floating-gate metal-oxide semiconductor metal-oxide semiconductor (MOS) transistor. Design/methodology/approach Based on this method, the authors calculate electric fields and electric potentials from the charges generated when voltages are applied to the control gates (CG). This technique allows us to consider cases when the floating gate has any trapped charge generated during the manufacturing process. Moreover, the authors introduce a mathematical function to describe the potential behavior through the substrate. From the resultant electric field, the authors compute the volume charge density at different depths. Findings The authors generate some three-dimensional graphics to show the volume charge density behavior, which allows us to predict regions in which the volume charge density tends to increase. This will be determined by the voltages on terminals, which reveal the relationship between CG and volume charge density and will allow us to analyze some superior-order phenomena. Originality/value The procedure presented here and based on coordinates has not been reported before, and it is an aid to generate a model of the device and to build simulation tools in an analog design environment.

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