scholarly journals Picosecond large‐signal switching characteristics of a pseudomorphic AlGaAs/InGaAs modulated doped field effect transistor

1992 ◽  
Vol 61 (10) ◽  
pp. 1187-1189 ◽  
Author(s):  
M. K. Jackson ◽  
M. Y. Frankel ◽  
J. F. Whitaker ◽  
G. A. Mourou ◽  
D. Hulin ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Large Signal ◽  
Signal Switching ◽  
Effect Transistor ◽  
Switching Characteristics

scholarly journals 4H-SiC Double Trench MOSFET with Split Heterojunction Gate for Improving Switching Characteristics

Materials ◽  
2021 ◽  
Vol 14 (13) ◽  
pp. 3554
Author(s):  
Jaeyeop Na ◽  
Jinhee Cheon ◽  
Kwangsoo Kim
Keyword(s):  
Dynamic Characteristics ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Switching Loss ◽  
Switching Speed ◽  
Polysilicon Gate ◽  
Effect Transistor ◽  
Switching Characteristics

In this paper, a novel 4H-SiC split heterojunction gate double trench metal-oxide-semiconductor field-effect transistor (SHG-DTMOS) is proposed to improve switching speed and loss. The device modifies the split gate double trench MOSFET (SG-DTMOS) by changing the N+ polysilicon split gate to the P+ polysilicon split gate. It has two separate P+ shielding regions under the gate to use the P+ split polysilicon gate as a heterojunction body diode and prevent reverse leakage `current. The static and most dynamic characteristics of the SHG-DTMOS are almost like those of the SG-DTMOS. However, the reverse recovery charge is improved by 65.83% and 73.45%, and the switching loss is improved by 54.84% and 44.98%, respectively, compared with the conventional double trench MOSFET (Con-DTMOS) and SG-DTMOS owing to the heterojunction.

scholarly journals A Study on the Effect of the Structural Parameters and Internal Mechanism of a Bilateral Gate-Controlled S/D Symmetric and Interchangeable Bidirectional Tunnel Field Effect Transistor

2021 ◽  
Vol 16 (1) ◽  
Author(s):  
Xiaoshi Jin ◽  
Yicheng Wang ◽  
Kailu Ma ◽  
Meile Wu ◽  
Xi Liu ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Structural Parameters ◽  
Cmos Integrated Circuits ◽  
Region Length ◽  
Internal Mechanism ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor ◽  
Switching Characteristics

AbstractA bilateral gate-controlled S/D symmetric and interchangeable bidirectional tunnel field effect transistor (B-TFET) is proposed in this paper, which shows the advantage of bidirectional switching characteristics and compatibility with CMOS integrated circuits compared to the conventional asymmetrical TFET. The effects of the structural parameters, e.g., the doping concentrations of the N+ region and P+ region, length of the N+ region and length of the intrinsic region, on the device performances, e.g., the transfer characteristics, Ion–Ioff ratio and subthreshold swing, and the internal mechanism are discussed and explained in detail.

A Large-Signal Monolayer Graphene Field-Effect Transistor Compact Model for RF-Circuit Applications

2017 ◽  
Vol 64 (10) ◽  
pp. 4302-4309 ◽  
Author(s):  
Jorge-Daniel Aguirre-Morales ◽  
Sebastien Fregonese ◽  
Chhandak Mukherjee ◽  
Wei Wei ◽  
Henri Happy ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Compact Model ◽  
Monolayer Graphene ◽  
Large Signal ◽  
Graphene Field Effect Transistor ◽  
Effect Transistor ◽  
Rf Circuit

scholarly journals Silicon Field Effect Transistor as the Nonlinear Detector for Terahertz Autocorellators

Sensors ◽  
2018 ◽  
Vol 18 (11) ◽  
pp. 3735 ◽  
Author(s):  
Kęstutis Ikamas ◽  
Ignas Nevinskas ◽  
Arūnas Krotkus ◽  
Alvydas Lisauskas
Keyword(s):  
Threshold Voltage ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Cryogenic Cooling ◽  
Thz Radiation ◽  
Gate Bias ◽  
Large Signal ◽  
Wide Range ◽  
Effect Transistor ◽  
Thz Power

We demonstrate that the rectifying field effect transistor, biased to the subthreshold regime, in a large signal regime exhibits a super-linear response to the incident terahertz (THz) power. This phenomenon can be exploited in a variety of experiments which exploit a nonlinear response, such as nonlinear autocorrelation measurements, for direct assessment of intrinsic response time using a pump-probe configuration or for indirect calibration of the oscillating voltage amplitude, which is delivered to the device. For these purposes, we employ a broadband bow-tie antenna coupled Si CMOS field-effect-transistor-based THz detector (TeraFET) in a nonlinear autocorrelation experiment performed with picoseconds-scale pulsed THz radiation. We have found that, in a wide range of gate bias (above the threshold voltage V th = 445 mV), the detected signal follows linearly to the emitted THz power. For gate bias below the threshold voltage (at 350 mV and below), the detected signal increases in a super-linear manner. A combination of these response regimes allows for performing nonlinear autocorrelation measurements with a single device and avoiding cryogenic cooling.

scholarly journals 3.3-kV 4H-SiC Split-Gate DMOSFET with Floating p+ Polysilicon for High-Frequency Applications

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 659
Author(s):  
Kyuhyun Cha ◽  
Jongwoon Yoon ◽  
Kwangsoo Kim
Keyword(s):  
High Frequency ◽  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Gate Oxide ◽  
Oxide Semiconductor ◽  
Static Characteristics ◽  
Gate Structure ◽  
Effect Transistor ◽  
Switching Characteristics

A split-gate metal–oxide–semiconductor field-effect transistor (SG-DMOSFET) is a well-known structure used for reducing the gate–drain capacitance (CGD) to improve switching characteristics. However, SG-DMOSFETs have problems such as the degradation of static characteristics and a high gate-oxide electric field. To solve these problems, we developed a SG-DMOSFET with floating p+ polysilicon (FPS-DMOSFET) and compared it with a conventional planar DMOSFET (C-DMOSFET) and a SG-DMOSFET through Technology Computer-Aided Design (TCAD) simulations. In the FPS-DMOSFET, floating p+ polysilicon (FPS) is inserted between the active gates to disperse the high drain voltage in the off state and form an accumulation layer over the entire junction field effect transistor (JFET) region, similar to a C-DMOSFET, in the on state. Therefore, the FPS-DMOSFET can minimize the degradation of static characteristics such as the breakdown voltage (BV) and specific on resistance (RON,SP) in the split-gate structure. Consequently, the FPS-DMOSFET can shorten the active gate length and achieve a gate-to-drain capacitance (CGD) that is less than those of the C-DMOSFET and SG-DMOSFET by 48% and 41%, respectively. Moreover, the high-frequency figure of merit (HF-FOM = RON,SP × CGD) of the FPS-DMOSFET is lower than those of the C-DMOSFET and SG-DMOSFET by 61% and 49%, respectively. In addition, the FPS-DMOSFET shows an EMOX of 2.1 MV/cm, which guarantees a gate oxide reliability limit of 3 MV/cm. Therefore, the proposed FPS-DMOSFET is the most appropriate device to be used in high-voltage and high-frequency electronic applications.

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