Laser‐compatible InGaAs/GaAs strained layer waveguide electroabsorption modulators

D. Moss; R. L. Williams; M. Dion; D. Landheer

doi:10.1063/1.105764

In situ TEM measurements of the electrical properties of interface dislocations

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100131322 ◽

1992 ◽

Vol 50 (2) ◽

pp. 1338-1339

Author(s):

F. M. Ross ◽

R. Hull ◽

D. Bahnck ◽

J. C. Bean ◽

L. J. Peticolas ◽

...

Keyword(s):

Electrical Properties ◽

Electronic Device ◽

In Situ Tem ◽

Device Performance ◽

Misfit Dislocations ◽

Electrical Characteristics ◽

Strained Layer ◽

Transmission Electron ◽

Interfacial Dislocations

We describe an investigation of the electrical properties of interfacial dislocations in strained layer heterostructures. We have been measuring both the structural and electrical characteristics of strained layer p-n junction diodes simultaneously in a transmission electron microscope, enabling us to correlate changes in the electrical characteristics of a device with the formation of dislocations.The presence of dislocations within an electronic device is known to degrade the device performance. This degradation is of increasing significance in the design and processing of novel strained layer devices which may require layer thicknesses above the critical thickness (hc), where it is energetically favourable for the layers to relax by the formation of misfit dislocations at the strained interfaces. In order to quantify how device performance is affected when relaxation occurs we have therefore been investigating the electrical properties of dislocations at the p-n junction in Si/GeSi diodes.

Download Full-text

The limits of strain and lattice parameter measurements by CBED

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100154561 ◽

1989 ◽

Vol 47 ◽

pp. 518-519

Author(s):

Hamish L. Fraser

Keyword(s):

Electron Beam ◽

Mirror Symmetry ◽

Local Symmetry ◽

Lattice Parameter ◽

Growth Direction ◽

Surface Relaxation ◽

Strained Layer ◽

Axis Parallel ◽

Local Lattice ◽

Strained Layer Superlattice

The topic of strain and lattice parameter measurements using CBED is discussed by reference to several examples. In this paper, only one of these examples is referenced because of the limitation of length. In this technique, scattering in the higher order Laue zones is used to determine local lattice parameters. Work (e.g. 1) has concentrated on a model strained-layer superlattice, namely Si/Gex-Si1-x. In bulk samples, the strain is expected to be tetragonal in nature with the unique axis parallel to [100], the growth direction. When CBED patterns are recorded from the alloy epi-layers, the symmetries exhibited by the patterns are not tetragonal, but are in fact distorted from this to lower symmetries. The spatial variation of the distortion close to a strained-layer interface has been assessed. This is most readily noted by consideration of Fig. 1(a-c), which show enlargements of CBED patterns for various locations and compositions of Ge. Thus, Fig. 1(a) was obtained with the electron beam positioned in the center of a 5Ge epilayer and the distortion is consistent with an orthorhombic distortion. When the beam is situated at about 150 nm from the interface, the same part of the CBED pattern is shown in Fig. 1(b); clearly, the symmetry exhibited by the mirror planes in Fig. 1 is broken. Finally, when the electron beam is positioned in the center of a 10Ge epilayer, the CBED pattern yields the result shown in Fig. 1(c). In this case, the break in the mirror symmetry is independent of distance form the heterointerface, as might be expected from the increase in the mismatch between 5 and 10%Ge, i.e. 0.2 to 0.4%, respectively. From computer simulation, Fig.2, the apparent monocline distortion corresponding to the 5Ge epilayer is quantified as a100 = 0.5443 nm, a010 = 0.5429 nm and a001 = 0.5440 nm (all ± 0.0001 nm), and α = β = 90°, γ = 89.96 ± 0.02°. These local symmetry changes are most likely due to surface relaxation phenomena.

Download Full-text

Si-Ge STRAINED LAYER SUPERLATTICES

Le Journal de Physique Colloques ◽

10.1051/jphyscol:1987569 ◽

1987 ◽

Vol 48 (C5) ◽

pp. C5-321-C5-327 ◽

Cited By ~ 5

Author(s):

H. BRUGGER ◽

G. ABSTREITER

Keyword(s):

Strained Layer ◽

Strained Layer Superlattices

Download Full-text

Hybrid Valence Bands in Strained-Layer Heterostructures grown on Relaxed SiGe Virtual Substrates

MRS Proceedings ◽

10.1557/proc-765-d4.10/g1.10 ◽

2003 ◽

Vol 765 ◽

Author(s):

Minjoo L. Lee ◽

Eugene A. Fitzgerald

Keyword(s):

Strained Silicon ◽

Strained Layer ◽

Dual Channel ◽

Enhanced Mobility ◽

Valence Bands ◽

Almost All

AbstractThe use of alternative channel materials such as germanium [1,2] and strained silicon (ε-Si) [3-5] is increasingly being considered as a method for improving the performance of MOSFETs. While ε-Si grown on relaxed Si1-x Gex is drawing closer to widespread commercialization, it is currently believed that almost all of the performance benefit in CMOS implementations will derive from the enhanced mobility of the n -MOSFET [5]. In this paper, we demonstrate that ε-Si p -MOSFETs can be engineered to exhibit mobility enhancements that increase or remain constant as a function of inversion density. We have also designed and fabricated ε-Si / ε-Ge dual-channel p -MOSFETs exhibiting mobility enhancements of 10 times. These p -MOSFETs can be integrated on the same wafers as ε-Si n -MOSFETs, making symmetric-mobility CMOS possible.

Download Full-text