Cryogenic operation of sub-30 nm nMOSFETs: Impact of device architecture

Journal de Physique IV (Proceedings) ◽

10.1051/jp420020034 ◽

2002 ◽

Vol 12 (3) ◽

pp. 45-49

Author(s):

G. Bertrand ◽

S. Deleonibus ◽

D. Souil ◽

B. Previtali ◽

C. Caillat ◽

...

Keyword(s):

Device Architecture

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Effect of substrate layer and Device Architecture on Photophysics and Device Performance of Planar Perovskite Solar Cells

10.29363/nanoge.abxpvperopto.2018.113 ◽

2017 ◽

Author(s):

Sampson Adjokatse ◽

Hong-hua Fang ◽

Jane Kardula ◽

Maria Antonietta Loi

Keyword(s):

Solar Cells ◽

Perovskite Solar Cells ◽

Device Performance ◽

Device Architecture ◽

Substrate Layer

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Information technology. UPnP Device Architecture

10.3403/30314291 ◽

2015 ◽

Keyword(s):

Information Technology ◽

Device Architecture

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Information technology. UPnP Device Architecture

10.3403/30314288u ◽

2015 ◽

Keyword(s):

Information Technology ◽

Device Architecture

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Information technology. UPnP Device Architecture

10.3403/30314246u ◽

2015 ◽

Keyword(s):

Information Technology ◽

Device Architecture

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Information technology. UPnP Device Architecture

10.3403/30314243 ◽

2015 ◽

Keyword(s):

Information Technology ◽

Device Architecture

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Information technology. UPnP Device Architecture

10.3403/30326587u ◽

2017 ◽

Keyword(s):

Information Technology ◽

Device Architecture

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Information technology. UPnP Device Architecture

10.3403/30326581 ◽

2017 ◽

Keyword(s):

Information Technology ◽

Device Architecture

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Information technology. UPnP Device Architecture

10.3403/30326743u ◽

2017 ◽

Keyword(s):

Information Technology ◽

Device Architecture

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Information technology. UPnP Device Architecture

10.3403/30326743 ◽

2017 ◽

Keyword(s):

Information Technology ◽

Device Architecture

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Information technology. UPnP Device Architecture

10.3403/30326740u ◽

2017 ◽

Keyword(s):

Information Technology ◽

Device Architecture

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