scholarly journals Electrical characterization of low temperature plasma epitaxial Si grown on highly doped Si substrates

2020 ◽  
Vol 11 ◽  
pp. 4
Author(s):  
Cyril Leon ◽  
Sylvain Le Gall ◽  
Marie-Estelle Gueunier-Farret ◽  
Jean-Paul Kleider ◽  
Pere Roca i Cabarrocas
Keyword(s):  
Low Temperature ◽  
Deep Level ◽  
Chemical Vapour ◽  
Electrical Characterization ◽  
Deposition Process ◽  
Doping Profile ◽  
Epitaxial Silicon ◽  
Temperature Plasma ◽  
Doping Density ◽  
Si Substrates

Epitaxial silicon layers were grown on highly doped c-Si substrates using the plasma-enhanced chemical vapour deposition process (PECVD) at low temperature (175 °C). The transport and defect-related properties of these epi-Si layers were characterized by current density-voltage (J–V) and capacitance–voltage (C–V) techniques. The results show that the epi-Si layers exhibit a non-intentional n-type doping with a low apparent doping density of about 2 × 1015 cm−3. The admittance spectroscopy technique is used to investigate the presence of deep-level defects in the structure. An energy level at 0.2 eV below the conduction band has been found with a density in the range of 1015 cm−3 which may explain the observed apparent doping profile.

scholarly journals Long-range ordered vertical III-nitride nano-cylinder arrays via plasma-assisted atomic layer deposition

2018 ◽  
Vol 6 (24) ◽  
pp. 6471-6482 ◽  
Author(s):  
Ali Haider ◽  
Petro Deminskyi ◽  
Mehmet Yilmaz ◽  
Kholoud Elmabruk ◽  
Ibrahim Yilmaz ◽  
...  
Keyword(s):  
Low Temperature ◽  
Atomic Layer Deposition ◽  
Atomic Layer ◽  
Low Temperature Plasma ◽  
Anodized Aluminum ◽  
Temperature Plasma ◽  
Anodized Aluminum Oxide ◽  
Si Substrates ◽  
Cylinder Arrays ◽  
Layer Deposition

In this work, we demonstrate vertical GaN, AlN, and InN hollow nano-cylindrical arrays (HNCs) grown on Si substrates using anodized aluminum oxide (AAO) membrane templated low-temperature plasma-assisted atomic layer deposition (PA-ALD).

Electrical Characterization of Low Temperature PECVD Oxides for TSV Applications

2018 ◽  
Vol 2018 (1) ◽  
pp. 000728-000733
Author(s):  
Piotr Mackowiak ◽  
Rachid Abdallah ◽  
Martin Wilke ◽  
Jash Patel ◽  
Huma Ashraf ◽  
...  
Keyword(s):  
Low Temperature ◽  
Electrical Characterization ◽  
Chemical Vapor ◽  
Silicon Substrates ◽  
Low Temperature Plasma ◽  
Temperature Plasma ◽  
Charge Densities ◽  
Doped Silicon

Abstract In the present work we investigate the quality of low temperature Plasma Enhanced Chemical Vapor Deposition (PECVD) and plasma treated Tetraethyl orthosilicate (TEOS)-based TSV-liner films. Different designs of Trough Silicon Via (TSV) Test structures with 10μm and 20μm width and a depth of 100μm have been fabricated. Two differently doped silicon substrates have been used – highly p-doped and moderately doped. The results for break-through, resistivity and capacitance for the 20μm structures show a better performance compared to the 10μm structures. This is mainly due to increased liner thickness in the reduced aspect ratio case. Lower interface traps and oxide charge densities have been observed in the C-V measurements results for the 10μm structures.

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