Analysis and design of a robust average current mode control loop for parallel buck DC-DC converters to reduce line and load disturbance
2004 ◽
Vol 151
(4)
◽
pp. 414
◽
2013 ◽
Vol 28
(10)
◽
pp. 4732-4741
◽
2014 ◽
Vol 24
(11)
◽
pp. 1450142
◽
1993 ◽
Vol 8
(2)
◽
pp. 112-119
◽
Keyword(s):