Coreless printed circuit board (PCB) transformers with high power density and high efficiency

2000 ◽  
Vol 36 (11) ◽  
pp. 943 ◽  
Author(s):  
S.C. Tang ◽  
S.Y.R. Hui ◽  
H. Chung
Keyword(s):  
Power Density ◽  
High Power ◽  
Printed Circuit Board ◽  
High Efficiency ◽  
Circuit Board ◽  
High Power Density ◽  
Printed Circuit

scholarly journals Modified Power Factor Correction (PFC) Control and Printed Circuit Board (PCB) Design for High-Efficiency and High-Power Density On-Board Charger

Energies ◽  
2021 ◽  
Vol 14 (3) ◽  
pp. 605
Author(s):  
Jaeil Baek ◽  
Moo-Hyun Park ◽  
Taewoo Kim ◽  
Han-Shin Youn
Keyword(s):  
Power Density ◽  
Power Factor ◽  
High Power ◽  
Printed Circuit Board ◽  
High Efficiency ◽  
Power Factor Correction ◽  
Circuit Board ◽  
High Power Density ◽  
Printed Circuit ◽  
Pcb Design

This paper presents a modified power factor correction (PFC) ON/OFF control and three-dimensional (3D) printed circuit board (PCB) design for a high-efficiency and high-power density onboard charger (OBC). By alternately operating one of two boost modules of the PFC stage at a 50% or less load condition, the proposed PFC control can reduce the load-independent power loss of the PFC stage, such as core loss and capacitor charging loss of switches. It enables OBCs to have high efficiency across a wide output power range and better thermal performance. The 3D-PCB design decouples a trade-off relationship of the PCB trace design and heat spreader design, increasing the power density of OBCs. A 3.3 kW prototype composed of an interleaved totem-pole bridgeless boost PFC converter and full-bridge (FB) LLC converter has been built and tested to verify the proposed PFC control and 3D-PCB effectiveness design. The prototype has 95.7% full power efficiency (98.2% PFC stage efficiency) and 52 W/in3 power density.

scholarly journals Optimal Design Analysis with Simulation and Experimental Performance Investigation of High-Power Density Telecom PFC Converters

2021 ◽  
Vol 11 (17) ◽  
pp. 7911
Author(s):  
Ahmed H. Okilly ◽  
Jeihoon Baek
Keyword(s):  
Optimal Design ◽  
Power Density ◽  
Power Factor ◽  
High Power ◽  
Power Efficiency ◽  
Printed Circuit Board ◽  
Current Control ◽  
Circuit Board ◽  
High Power Density ◽  
Control Circuits

The spread of the 5G technology in the telecom power applications increased the need to supply high power density with higher efficiency and higher power factor. Thus, in this paper, the performance of the different power factor correction ( PFC ) topologies implemented to work with high power density telecom power applications are investigated. Two topologies, namely the conventional and the bridge interleaved continues-current-conduction mode (CCM) PFC boost converters are designed. Selection methodology of the switching elements, the manufacturing of the boost inductors, and the optimal design for the voltage and current control circuits based on the proposed small signal stability modeling are presented. The printed circuit board (PCB) for the two different PFC topologies with a power rating of 2 kW were designed. PSIM simulation and the experiments are used to show the supply current total harmonic distortions (THD), voltage ripples, power efficiency, and the power factor for the different topologies with different loading conditions.

scholarly journals Near-field thermophotovoltaics for efficient heat to electricity conversion at high power density

2021 ◽  
Vol 12 (1) ◽  
Author(s):  
Rohith Mittapally ◽  
Byungjun Lee ◽  
Linxiao Zhu ◽  
Amin Reihani ◽  
Ju Won Lim ◽  
...  
Keyword(s):  
Power Density ◽  
High Power ◽  
High Efficiency ◽  
Near Field ◽  
Electrical Power ◽  
Photovoltaic Cells ◽  
High Power Density ◽  
Pv Cell ◽  
Electrical Power Output ◽  
Power Densities

AbstractThermophotovoltaic approaches that take advantage of near-field evanescent modes are being actively explored due to their potential for high-power density and high-efficiency energy conversion. However, progress towards functional near-field thermophotovoltaic devices has been limited by challenges in creating thermally robust planar emitters and photovoltaic cells designed for near-field thermal radiation. Here, we demonstrate record power densities of ~5 kW/m2 at an efficiency of 6.8%, where the efficiency of the system is defined as the ratio of the electrical power output of the PV cell to the radiative heat transfer from the emitter to the PV cell. This was accomplished by developing novel emitter devices that can sustain temperatures as high as 1270 K and positioning them into the near-field (<100 nm) of custom-fabricated InGaAs-based thin film photovoltaic cells. In addition to demonstrating efficient heat-to-electricity conversion at high power density, we report the performance of thermophotovoltaic devices across a range of emitter temperatures (~800 K–1270 K) and gap sizes (70 nm–7 µm). The methods and insights achieved in this work represent a critical step towards understanding the fundamental principles of harvesting thermal energy in the near-field.

High-Power-Density High-Efficiency Bottom-Emitting Vertical-Cavity Surface-Emitting Laser Array

2011 ◽  
Vol 4 (5) ◽  
pp. 052104 ◽  
Author(s):  
Di Liu ◽  
Yongqiang Ning ◽  
Yugang Zeng ◽  
Li Qin ◽  
Yun Liu ◽  
...  
Keyword(s):  
Power Density ◽  
High Power ◽  
High Efficiency ◽  
Cavity Surface ◽  
High Power Density ◽  
Laser Array ◽  
Vertical Cavity Surface ◽  
Surface Emitting Laser ◽  
Vertical Cavity

High Temperature Silicon-on-Insulator Gate Driver for SiC-FET Power Modules

2011 ◽  
Vol 2011 (HITEN) ◽  
pp. 000152-000158
Author(s):  
J. Valle Mayorga ◽  
C. Gutshall ◽  
K. Phan ◽  
I. Escorcia ◽  
H. A. Mantooth ◽  
...  
Keyword(s):  
Power Density ◽  
High Power ◽  
High Efficiency ◽  
Low Voltage ◽  
Silicon On Insulator ◽  
Switching Frequency ◽  
Cmos Process ◽  
High Power Density ◽  
Power Modules ◽  
Gate Driver

SiC power semiconductors have the capability of greatly outperforming Si-based power devices. Faster switching and smaller on-state losses coupled with higher voltage blocking and temperature capabilities, make SiC a very attractive semiconductor for high performance, high power density power modules. However, the temperature capabilities and increased power density are fully utilized only when the gate driver is placed next to the SiC devices. This requires the gate driver to successfully operate under these extreme conditions with reduced or no heat sinking requirements, allowing the full realization of a high efficiency, high power density SiC power module. In addition, since SiC devices are usually connected in a half or full bridge configuration, the gate driver should provide electrical isolation between the high and low voltage sections of the driver itself. This paper presents a 225 degrees Celsius operable, Silicon-On-Insulator (SOI) high voltage isolated gate driver IC for SiC devices. The IC was designed and fabricated in a 1 μm, partially depleted, CMOS process. The presented gate driver consists of a primary and a secondary side which are electrically isolated by the use of a transformer. The gate driver IC has been tested at a switching frequency of 200 kHz at 225 degrees Celsius while exhibiting a dv/dt noise immunity of at least 45 kV/μs.

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