Silicon stacked tunnel transistor for high-speed and high-density random access memory gain cells

1999 ◽  
Vol 35 (10) ◽  
pp. 848 ◽  
Author(s):  
K. Nakazato ◽  
K. Itoh ◽  
H. Mizuta ◽  
H. Ahmed
Keyword(s):  
High Speed ◽  
Random Access ◽  
Random Access Memory ◽  
High Density ◽  
Access Memory ◽  
Tunnel Transistor

scholarly journals Challenges and Applications of Emerging Nonvolatile Memory Devices

Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 1029 ◽  
Author(s):  
Writam Banerjee
Keyword(s):  
Nonvolatile Memory ◽  
High Speed ◽  
Low Voltage ◽  
Random Access ◽  
Random Access Memory ◽  
Spin Transfer Torque ◽  
High Density ◽  
Memory Storage ◽  
Access Memory ◽  
Ultra Low Power

Emerging nonvolatile memory (eNVM) devices are pushing the limits of emerging applications beyond the scope of silicon-based complementary metal oxide semiconductors (CMOS). Among several alternatives, phase change memory, spin-transfer torque random access memory, and resistive random-access memory (RRAM) are major emerging technologies. This review explains all varieties of prototype and eNVM devices, their challenges, and their applications. A performance comparison shows that it is difficult to achieve a “universal memory” which can fulfill all requirements. Compared to other emerging alternative devices, RRAM technology is showing promise with its highly scalable, cost-effective, simple two-terminal structure, low-voltage and ultra-low-power operation capabilities, high-speed switching with high-endurance, long retention, and the possibility of three-dimensional integration for high-density applications. More precisely, this review explains the journey and device engineering of RRAM with various architectures. The challenges in different prototype and eNVM devices is disused with the conventional and novel application areas. Compare to other technologies, RRAM is the most promising approach which can be applicable as high-density memory, storage class memory, neuromorphic computing, and also in hardware security. In the post-CMOS era, a more efficient, intelligent, and secure computing system is possible to design with the help of eNVM devices.

Investigation on Ultra-high Density and High Speed Non-volatile Phase Change Random Access Memory (PCRAM) by Material Engineering

2006 ◽  
Vol 918 ◽  
Author(s):  
E.G. Yeo ◽  
L.P Shi ◽  
R Zhao ◽  
T.C. Chong
Keyword(s):  
Phase Change ◽  
High Speed ◽  
Activation Barrier ◽  
Random Access ◽  
Random Access Memory ◽  
High Density ◽  
Access Memory ◽  
Scanning Calorimetry ◽  
Material Engineering ◽  
Volatile Phase

AbstractIn this paper, ultra-high memory density and high speed non-volatile phase change random access memory (PCRAM) was investigated by material engineering. The melting point, crystallization point and activation energy of crystallization of the Bismuth (Bi) doped Germanium-Antimony-Tellurium (GeSbTe) compound was measured using differential scanning calorimetry (DSC) and compared to other GeSbTe ternary compounds. It was observed that the melting temperature of Bi-doped GeSbTe was lower than that of GeSbTe. On the other hand, its activation barrier was found to be reduced, which in turn increased the speed of crystallization of Bi-doped GeSbTe. Bi-doped GeSbTe was then used as a phase change material in the fabrication of PCRAM devices. The properties of PCRAM fabricated using this material were then compared to those using GeSbTe, with emphasis on the programming current required. The results obtained revealed that lower programming current of up to 40% has been achieved for PCRAM with Bi-doped GeSbTe compared to those with other GeSbTe compounds. Bi-doped GeSbTe also has low RESET current and fast speed of crystallization with scaling, making it a suitable material for high speed, ultra-high density PCRAM fabrication in the future.

Prospect of Emerging Nonvolatile Memories

2004 ◽  
Vol 830 ◽  
Author(s):  
Hongsik Jeong ◽  
Kinam Kim
Keyword(s):  
High Speed ◽  
Low Cost ◽  
Random Access ◽  
Random Access Memory ◽  
High Density ◽  
Access Memory ◽  
Flash Memories ◽  
Nonvolatile Memories ◽  
Critical Technology ◽  
The Future

ABSTRACTConventional nonvolatile memories such as Flash and EEPROM memory have successfully evolved toward high density and low cost. Especially, the market and density of flash memories has grown rapidly which leads semiconductor technology. However, there have been concerns about whether this successful progress can be maintained in the future nano era and can satisfy the requirement of diversified future IT market. Flash memories have the advantage of high density with small cell size and by contraries the disadvantage of slow writing speed and limited endurance. This slow writing speed and limited endurance is not aligned with the trend of high speed and reliability for future semiconductor memories.The future for these conventional nonvolatile memories forces many research groups and companies to develop alternative memories with ideal memory characteristics such as non-volatility, high density, high speed, and low power, which none of the conventional memories can satisfy at the same time.In this article, I will evaluate the characteristics of future nonvolatile memories such as ferroelectric random access memory (FRAM), magnetoresistive random access memory (MRAM) and phase change random access memory (PRAM). These memories have been recently evaluated because of the possibility that they can overcome the challenges that conventional memories are facing. Finally we will review critical technology barriers in developing future memory and predict the promising technology to overcome the barriers in conventional and emerging new memories, which will be technology guidelines for future memory development.

Design and Analysis of SRAM Cell using Negative Bit-Line Write Assist Technique and Separate Read Port for High-Speed Applications

2021 ◽  
pp. 2150270
Author(s):  
Jitendra Kumar Mishra ◽  
Lakshmi Likhitha Mankali ◽  
Kavindra Kandpal ◽  
Prasanna Kumar Misra ◽  
Manish Goswami
Keyword(s):  
Power Dissipation ◽  
High Speed ◽  
Random Access ◽  
Random Access Memory ◽  
Access Memory ◽  
Static Noise Margin ◽  
Semiconductor Memory ◽  
Noise Margin ◽  
Sram Cell ◽  
Static Noise

The present day electronic gadgets have semiconductor memory devices to store data. The static random access memory (SRAM) is a volatile memory, often preferred over dynamic random access memory (DRAM) due to higher speed and lower power dissipation. However, at scaling down of technology node, the leakage current in SRAM often increases and degrades its performance. To address this, the voltage scaling is preferred which subsequently affects the stability and delay of SRAM. This paper therefore presents a negative bit-line (NBL) write assist circuit which is used for enhancing the write ability while a separate (isolated) read buffer circuit is used for improving the read stability. In addition to this, the proposed design uses a tail (stack) transistor to decrease the overall static power dissipation and also to maintain the hold stability. The comparison of the proposed design has been done with state-of-the-art work in terms of write static noise margin (WSNM), write delay, read static noise margin (RSNM) and other parameters. It has been observed that there is an improvement of 48%, 11%, 19% and 32.4% in WSNM while reduction of 33%, 39%, 48% and 22% in write delay as compared to the conventional 6T SRAM cell, NBL, [Formula: see text] collapse and 9T UV SRAM, respectively.

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