System characterisation of high gain and high saturated output power, Pr3+-doped fluorozirconate fibre amplifier at 1.3 μm

1991 ◽  
Vol 27 (16) ◽  
pp. 1472 ◽  
Author(s):  
R. Lobbett ◽  
R. Wyatt ◽  
P. Eardley ◽  
T.J. Whitley ◽  
P. Smyth ◽  
...  
Keyword(s):  
Output Power ◽  
High Gain ◽  
Fibre Amplifier ◽  
Saturated Output Power

High gain limiting erbium-doped fibre amplifier with over 30 dB dynamic range

1991 ◽  
Vol 27 (3) ◽  
pp. 211 ◽  
Author(s):  
W.I. Way ◽  
D. Chen ◽  
M.A. Saifi ◽  
M.J. Andrejco ◽  
A. Yi-Yan ◽  
...  
Keyword(s):  
Dynamic Range ◽  
High Gain ◽  
Fibre Amplifier ◽  
Erbium Doped

Optimization of InP DHBT stacked-transistors for millimeter-wave power amplifiers

2018 ◽  
Vol 10 (9) ◽  
pp. 999-1010 ◽  
Author(s):  
Michele Squartecchia ◽  
Tom K. Johansen ◽  
Jean-Yves Dupuy ◽  
Virginio Midili ◽  
Virginie Nodjiadjim ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Output Power ◽  
Heterojunction Bipolar Transistors ◽  
Power Amplifiers ◽  
Small Signal Gain ◽  
Small Signal ◽  
Large Signal ◽  
Signal Gain ◽  
Power Added Efficiency ◽  
Saturated Output Power

AbstractIn this paper, we report the analysis, design, and implementation of stacked transistors for power amplifiers realized on InP Double Heterojunction Bipolar Transistors (DHBTs) technology. A theoretical analysis based on the interstage matching between all the single transistors has been developed starting from the small-signal equivalent circuit. The analysis has been extended by including large-signal effects and layout-related limitations. An evaluation of the maximum number of transistors for positive incremental power and gain is also carried out. To validate the analysis, E-band three- and four-stacked InP DHBT matched power cells have been realized for the first time as monolithic microwave integrated circuits (MMICs). For the three-stacked transistor, a small-signal gain of 8.3 dB, a saturated output power of 15 dBm, and a peak power added efficiency (PAE) of 5.2% have been obtained at 81 GHz. At the same frequency, the four-stacked transistor achieves a small-signal gain of 11.5 dB, a saturated output power of 14.9 dBm and a peak PAE of 3.8%. A four-way combined three-stacked MMIC power amplifier has been implemented as well. It exhibits a linear gain of 8.1 dB, a saturated output power higher than 18 dBm, and a PAE higher than 3% at 84 GHz.

Mode control in a high gain relativistic klystron amplifier with 3 GW output power

2014 ◽  
Vol 38 (1) ◽  
pp. 017001 ◽  
Author(s):  
Yang Wu ◽  
Hong-Quan Xie ◽  
Zhou Xu
Keyword(s):  
Output Power ◽  
High Gain ◽  
Mode Control ◽  
Relativistic Klystron

A broadband 23.1 ∼ 27.2 GHz doherty power amplifier with peak output power of 24.3 dBm

Circuit World ◽  
2019 ◽  
Vol 46 (1) ◽  
pp. 1-5
Author(s):  
Yanfeng Fang ◽  
Yijiang Zhang
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Input Power ◽  
Content Type ◽  
Fully Integrated ◽  
Power Added Efficiency ◽  
Peak Output Power ◽  
Saturated Output Power ◽  
Direct Input ◽  
Matching Techniques

Purpose This paper aims to implement a new high output power fully integrated 23.1 to 27.2 GHz gallium arsenide heterojunction bipolar transistor power amplifier (PA) to meet the stringent linearity requirements of LTE systems. Design/methodology/approach The direct input power dividing technique is used on the chip. Broadband input and output matching techniques are used for broadband Doherty operation. Findings The PA achieves a small-signal gain of 22.8 dB at 25.1 GHz and a saturated output power of 24.3 dBm at 25.1 GHz with a maximum power added efficiency of 31.7%. The PA occupies 1.56 mm2 (including pads) and consumes a maximum current of 79.91 mA from a 9 V supply. Originality/value In this paper, the author proposed a novel direct input dividing technique with broadband matching circuits using a low Q output matching technique, and demonstrated a fully-integrated Doherty PA across frequencies of 23.1∼27.2 GHz for long term evolution-license auxiliary access (LTE-LAA) handset applications.

A 4.2-to-5.4 GHz stacked GaAs HBT power amplifier for C-band applications

Circuit World ◽  
2020 ◽  
Vol 46 (4) ◽  
pp. 243-248
Author(s):  
Min Liu ◽  
Panpan Xu ◽  
Jincan Zhang ◽  
Bo Liu ◽  
Liwen Zhang
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
High Power ◽  
High Efficiency ◽  
Common Source ◽  
Power Performance ◽  
Matching Network ◽  
Content Type ◽  
Power Added Efficiency ◽  
Saturated Output Power

Purpose Power amplifiers (PAs) play an important role in wireless communications because they dominate system performance. High-linearity broadband PAs are of great value for potential use in multi-band system implementation. The purpose of this paper is to present a cascode power amplifier architecture to achieve high power and high efficiency requirements for 4.2∼5.4 GHz applications. Design/methodology/approach A common emitter (CE) configuration with a stacked common base configuration of heterojunction bipolar transistor (HBT) is used to achieve high power. T-type matching network is used as input matching network. To increase the bandwidth, the output matching networks are implemented using the two L-networks. Findings By using the proposed method, the stacked PA demonstrates a maximum saturated output power of 26.2 dBm, a compact chip size of 1.17 × 0.59 mm2 and a maximum power-added efficiency of 46.3 per cent. The PA shows a wideband small signal gain with less than 3 dB variation over working frequency. The saturated output power of the proposed PA is higher than 25 dBm between 4.2 and 5.4 GHz. Originality/value The technology adopted for the design of the 4.2-to-5.4 GHz stacked PA is the 2-µm gallium arsenide HBT process. Based on the proposed method, a better power performance of 3 dB improvement can be achieved as compared with the conventional CE or common-source amplifier because of high output stacking impedance.

scholarly journals A Power Amplifier with Large High-Efficiency Range for 5G Communication

Sensors ◽  
2020 ◽  
Vol 20 (19) ◽  
pp. 5581
Author(s):  
Zhiwei Zhang ◽  
Zhiqun Cheng ◽  
Guohua Liu
Keyword(s):  
Output Power ◽  
Design Process ◽  
Power Amplifier ◽  
High Efficiency ◽  
New Method ◽  
Saturated Output Power ◽  
Doherty Power Amplifier ◽  
5G Communication

This paper presents a new method to design a Doherty power amplifier (DPA) with a large, high-efficiency range for 5G communication. This is through analyzing the drain-to-source capacitance (CDS) of DPAs, and adopting appropriate impedance of the peak device. A closed design process is proposed, to design the extended efficiency range DPA based on derived theories. For validation, a DPA with large efficiency range was designed and fabricated by using two equal devices. The measured results showed that the saturated output power was between 43.4 dBm and 43.7 dBm in the target band. Around 70% saturated drain efficiency is obtained with a gain of greater than 11 dB. Moreover, the obtained drain efficiency is larger than 50% at the 10 dB power back-off, when operating at 3.5 GHz. These superior performances illustrate that the implemented DPA can be applied well in 5G communication.

W-Band CMOS Amplifiers Achieving $+$10 dBm Saturated Output Power and 7.5 dB NF

2009 ◽  
Vol 44 (12) ◽  
pp. 3403-3409 ◽  
Author(s):  
Dan Sandstrom ◽  
Mikko Varonen ◽  
Mikko Karkkainen ◽  
Kari A. I. Halonen
Keyword(s):  
Output Power ◽  
W Band ◽  
Saturated Output Power
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