Depth profiling of integrated circuits with thermal wave electron microscopy

1980 ◽  
Vol 16 (24) ◽  
pp. 928 ◽  
Author(s):  
A. Rosencwaig
Author(s):  
J. R. Michael ◽  
A. D. Romig ◽  
D. R. Frear

Al with additions of Cu is commonly used as the conductor metallizations for integrated circuits, the Cu being added since it improves resistance to electromigration failure. As linewidths decrease to submicrometer dimensions, the current density carried by the interconnect increases dramatically and the probability of electromigration failure increases. To increase the robustness of the interconnect lines to this failure mode, an understanding of the mechanism by which Cu improves resistance to electromigration is needed. A number of theories have been proposed to account for role of Cu on electromigration behavior and many of the theories are dependent of the elemental Cu distribution in the interconnect line. However, there is an incomplete understanding of the distribution of Cu within the Al interconnect as a function of thermal history. In order to understand the role of Cu in reducing electromigration failures better, it is important to characterize the Cu distribution within the microstructure of the Al-Cu metallization.


1996 ◽  
Vol 11 (5) ◽  
pp. 1244-1254 ◽  
Author(s):  
Nancy E. Lumpkin ◽  
Gregory R. Lumpkin ◽  
K. S. A. Butcher

A process for the formation of low-resistance Ni–Ge–Au ohmic contacts to n+ GaAs has been refined using multivariable screening and response surface experiments. Samples from the refined, low-resistance process (which measure 0.05 ± 0.02 Ω · mm) and the unrefined, higher resistance process (0.17 ± 0.02 Ω · mm) were characterized using analytical electron microscopy (AEM), transmission electron microscopy (TEM), scanning electron microscopy-energy dispersive spectroscopy (SEM-EDS), and x-ray photoemission spectroscopy (XPS) depth profiling methods. This approach was used to identify microstructural differences and compare them with electrical resistance measurements. Analytical results of the unrefined ohmic process sample reveal a heterogeneous, multiphase microstructure with a rough alloy-GaAs interface. The sample from the refined ohmic process exhibits an alloy which is homogeneous, smooth, and has a fine-grained microstructure with two uniformly distributed phases. XPS analysis for the refined ohmic process sample indicates that the Ge content is relatively depleted in the alloy (relative to the deposited Ge amount) and enriched in the GaAs. This is not evidenced in the unrefined ohmic process sample. Our data lead us to conclude that a smooth, uniform, two-phase microstructure, coupled with a shift in Ge content from the post-alloy metal to the GaAs, is important in forming low-resistance ohmic contacts.


1999 ◽  
Vol 5 (S2) ◽  
pp. 932-933
Author(s):  
W. Li ◽  
S. Q. Wang ◽  
R. Trussell ◽  
M. Xu ◽  
R.D. Venables ◽  
...  

The continued reduction in the size of critical features in integrated circuits has resulted in the need to develop rapid, site-specific, sectioning techniques to enable efficient physical characterization of the structures of interest. We have implemented a mechanical polishing approach to achieve this objective with the additional goals of maximizing the number of targeted sites in a sample that can be analyzed, and minimizing physically destructive procedures, such as ion beam exposure. Precision sample preparation approaches have been under investigation for both transmission electron microscopy and scanning electron microscopy.The mechanical specimen preparation approach used in this work is a variant of the well-known wedge polishing technique. Here we use a polishing tool that does not contact the grinding surface, thus allowing precise control of the wedge angle. Prior to sample preparation, the polishing tool head was precision aligned parallel to the platen.


1982 ◽  
Vol 53 (6) ◽  
pp. 4240-4246 ◽  
Author(s):  
Jon Opsal ◽  
Allan Rosencwaig
Keyword(s):  

2011 ◽  
Vol 1349 ◽  
Author(s):  
Thomas Hantschel ◽  
Xiaoxing Ke ◽  
Nicolo’ Chiodarelli ◽  
Andreas Schulze ◽  
Hugo Bender ◽  
...  

ABSTRACTThe use of carbon nanotubes (CNT) as interconnects in future integrated circuits (IC) is being considered as a replacement for copper. As this research needs also innovative metrology solutions, we have developed a combined approach for the plane-view analysis of CNT integrated in contact holes where transmission electron microscopy (TEM) enables the quantitative measurement of density and structure of the CNT and where scanning spreading resistance microscopy (SSRM) is used to electrically map the distribution of the CNT. This paper explains the used methodologies in detail and presents results from 300 nm diameter contact holes filled with CNT of 8-12 nm in diameter and a density of about 2 x 1011 cm-2.


1988 ◽  
Vol 3 (6) ◽  
pp. 1238-1246 ◽  
Author(s):  
J. K. N. Lindner ◽  
E. H. te Kaat

Six MeV high-dose Ni implantation into silicon has been applied to synthesize deep-buried metallic layers. These layers have been analyzed by optical reflectivity and spreading resistance depth profiling as well as transmission electron microscopy and cross-section transmission electron microscopy. Already in the as-implanted state, at target temperatures of 450 K and doses above 1017 Ni/cm2, epitaxial precipitates of NiSi2 are formed. They grow in type-A and type-B orientations. In addition to these polyhedral crystallites, thin NiSi2 platelets on {111} lattice planes exist. At a dose of 1.3 × 1018 Ni/cm2, a continuous but highly defective layer of epitaxial NiSi2 is formed by coalescence of mainly type-A precipitates at the maximum of the Ni profile. Investigations indicate that damage gettering of nickel atoms as well as the atomic density increase during implantation influence the depth distribution of implanted metal atoms. Moreover, a suppression of silicon amorphization by nickel is evident.


1989 ◽  
Vol 4 (1) ◽  
pp. 20-24 ◽  
Author(s):  
V Gusev ◽  
Ts Velinov ◽  
K Bransalov
Keyword(s):  

Sign in / Sign up

Export Citation Format

Share Document