scholarly journals Gate leakage compensation technique for self-cascode based voltage references

2020 ◽  
Vol 56 (22) ◽  
pp. 1174-1176
Author(s):  
F. Olivera ◽  
A. Petraglia
Keyword(s):  
Gate Leakage ◽  
Compensation Technique ◽  
Self Cascode

Influence of the Aperture Edge Diffraction Effects on the Mutual Coupling Compensation Technique in Small Planar Antenna Arrays

2011 ◽  
Vol 57 (1) ◽  
pp. 115-120 ◽  
Author(s):  
Mariusz Zamłyński ◽  
Piotr Słobodzian
Keyword(s):  
Antenna Arrays ◽  
Mutual Coupling ◽  
Planar Antenna ◽  
Sidelobe Level ◽  
Edge Diffraction ◽  
Narrow Angle ◽  
Compensation Technique ◽  
Diffraction Effects ◽  
Linear Antenna Arrays

Influence of the Aperture Edge Diffraction Effects on the Mutual Coupling Compensation Technique in Small Planar Antenna Arrays In this paper the quality of a technique to compensate for mutual coupling (and other phenomena) in small linear antenna arrays is investigated. The technique consists in calculation of a coupling matrix, which is than used to determine corrected antenna array excitation coefficients. Although the technique is known for more than 20 years, there is still very little information about how different phenomena existing in a real antenna arrays influence its performance. In this paper two models of antenna arrays are used. In the first model the effect of mutual coupling is separated from the aperture edge diffraction. In the second model antenna both mutual coupling and aperture edge diffraction effects are included. It is shown that mutual coupling itself can be compensated very well and an ultralow sidelobe level (i.e. -50 dB) could be achieved in practice. In the presence of diffraction effects -46.3 dB sidelobe level has been attained, but radiation pattern can be controled only in narrow angle range (i.e. up to ±60°).

The Electrical Characterization and Physical Failure Analysis for Transistor Gate Leakage

2006 ◽  
Author(s):  
Tsung-Te Li ◽  
Chao-Chi Wu ◽  
Jung-Hsiang Chuang ◽  
Jon C. Lee
Keyword(s):  
Failure Analysis ◽  
Electrical Characterization ◽  
Physical Analysis ◽  
Gate Leakage ◽  
Force Microscopy ◽  
Atomic Force ◽  
Transmission Electron ◽  
Voltage Stress ◽  
Leakage Site

Abstract This article describes the electrical and physical analysis of gate leakage in nanometer transistors using conducting atomic force microscopy (C-AFM), nano-probing, transmission electron microscopy (TEM), and chemical decoration on simulated overstressed devices. A failure analysis case study involving a soft single bit failure is detailed. Following the nano-probing analysis, TEM cross sectioning of this failing device was performed. A voltage bias was applied to exaggerate the gate leakage site. Following this deliberate voltage overstress, a solution of boiling 10%wt KOH was used to etch decorate the gate leakage site followed by SEM inspection. Different transistor leakage behaviors can be identified with nano-probing measurements and then compared with simulation data for increased confidence in the failure analysis result. Nano-probing can be used to apply voltage stress on a transistor or a leakage path to worsen the weak point and then observe the leakage site easier.

Characterization of a Resistive Path to a Gate Node Using Tunneling Current Measurements

2010 ◽  
Author(s):  
Clifford Howard ◽  
Sam Subramanian ◽  
Kent Erington ◽  
Randall Mulder ◽  
Yuk Tsang ◽  
...  
Keyword(s):  
High Resistance ◽  
Tunneling Current ◽  
Resistance Measurement ◽  
Gate Leakage ◽  
Advanced Technologies

Abstract Advanced technologies with higher gate leakage due to oxide tunneling current enable detection of high resistance faults to gate nodes using a straight forward resistance measurement.

An instrument for the measurement of colour and turbidity in natural waters

1998 ◽  
Vol 37 (12) ◽  
pp. 263-267 ◽  
Author(s):  
Henry O. Edwards
Keyword(s):  
Water Treatment ◽  
Natural Waters ◽  
Beam Intensity ◽  
Compensation Technique

The development of a sensor to measure colour and turbidity of natural waters is described. Filtration of the water is not required, so maintenance intervals and costs will be reduced. A four-beam intensity compensation technique is used for robust measurement and resistance to fouling. Results of the operation of a prototype at a water treatment works are presented.

Modeling of HKMG Stack Process Impact on Gate Leakage, SILC and PBTI

2021 ◽  
Author(s):  
Dimple Kochar ◽  
Tarun Samadder ◽  
Subhadeep Mukhopadhyay ◽  
Souvik Mahapatra
Keyword(s):  
Gate Leakage

Gate Leakage for 28 nm Stacked HfZrOx Dielectric of p-Channel MOSFETs After Decoupled Plasma Nitridation Treatment With Annealing Temperatures

2014 ◽  
Vol 42 (12) ◽  
pp. 3712-3715 ◽  
Author(s):  
Shea-Jue Wang ◽  
Mu-Chun Wang ◽  
Win-Der Lee ◽  
Jie-Min Yang ◽  
L. S. Huang ◽  
...  
Keyword(s):  
Gate Leakage ◽  
Plasma Nitridation ◽  
Annealing Temperatures ◽  
28 Nm
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