Two‐transistor and two‐magnetic‐tunnel‐junction multi‐level cell structured spin‐transfer torque magnetic random access memory with optimisations on power and reliability
2012 ◽
Vol 51
(2)
◽
pp. 02BD01
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2012 ◽
Vol 51
(2S)
◽
pp. 02BD01
◽
2005 ◽
Vol 41
(2)
◽
pp. 899-902
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2021 ◽
Vol 39
(5)
◽
pp. 052210
2007 ◽
Vol 46
(7A)
◽
pp. 4121-4124
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