A pseudo-real time distribution network simulator for analysis of coordinated ANM control strategies

Author(s):  
J. Robertson ◽  
G.P. Harrison ◽  
A.R. Wallace
1997 ◽  
Vol 36 (8-9) ◽  
pp. 331-336 ◽  
Author(s):  
Gabriela Weinreich ◽  
Wolfgang Schilling ◽  
Ane Birkely ◽  
Tallak Moland

This paper presents results from an application of a newly developed simulation tool for pollution based real time control (PBRTC) of urban drainage systems. The Oslo interceptor tunnel is used as a case study. The paper focuses on the reduction of total phosphorus Ptot and ammonia-nitrogen NH4-N overflow loads into the receiving waters by means of optimized operation of the tunnel system. With PBRTC the total reduction of the Ptot load is 48% and of the NH4-N load 51%. Compared to the volume based RTC scenario the reductions are 11% and 15%, respectively. These further reductions could be achieved with a relatively simple extension of the operation strategy.


Author(s):  
Neetika Jain ◽  
Sangeeta Mittal

Background: Real Time Wireless Sensor Networks (RT-WSN) have hard real time packet delivery requirements. Due to resource constraints of sensors, these networks need to trade-off energy and latency. Objective: In this paper, a routing protocol for RT-WSN named “SPREAD” has been proposed. The underlying idea is to reserve laxity by assuming tighter packet deadline than actual. This reserved laxity is used when no deadline-meeting next hop is available. Objective: As a result, if due to repeated transmissions, energy of nodes on shortest path is drained out, then time is still left to route the packet dynamically through other path without missing the deadline. Results: Congestion scenarios have been addressed by dynamically assessing 1-hop delays and avoiding traffic on congested paths. Conclusion: Through extensive simulations in Network Simulator NS2, it has been observed that SPREAD algorithm not only significantly reduces miss ratio as compared to other similar protocols but also keeps energy consumption under control. It also shows more resilience towards high data rate and tight deadlines than existing popular protocols.


Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 13
Author(s):  
Balaji M ◽  
Chandrasekaran M ◽  
Vaithiyanathan Dhandapani

A Novel Rail-Network Hardware with simulation facilities is presented in this paper. The hardware is designed to facilitate the learning of application-oriented, logical, real-time programming in an embedded system environment. The platform enables the creation of multiple unique programming scenarios with variability in complexity without any hardware changes. Prior experimental hardware comes with static programming facilities that focus the students’ learning on hardware features and programming basics, leaving them ill-equipped to take up practical applications with more real-time constraints. This hardware complements and completes their learning to help them program real-world embedded systems. The hardware uses LEDs to simulate the movement of trains in a network. The network has train stations, intersections and parking slots where the train movements can be controlled by using a 16-bit Renesas RL78/G13 microcontroller. Additionally, simulating facilities are provided to enable the students to navigate the trains by manual controls using switches and indicators. This helps them get an easy understanding of train navigation functions before taking up programming. The students start with simple tasks and gradually progress to more complicated ones with real-time constraints, on their own. During training, students’ learning outcomes are evaluated by obtaining their feedback and conducting a test at the end to measure their knowledge acquisition during the training. Students’ Knowledge Enhancement Index is originated to measure the knowledge acquired by the students. It is observed that 87% of students have successfully enhanced their knowledge undergoing training with this rail-network simulator.


Energies ◽  
2021 ◽  
Vol 14 (11) ◽  
pp. 3274
Author(s):  
Jose Rueda Torres ◽  
Zameer Ahmad ◽  
Nidarshan Veera Kumar ◽  
Elyas Rakhshani ◽  
Ebrahim Adabi ◽  
...  

Future electrical power systems will be dominated by power electronic converters, which are deployed for the integration of renewable power plants, responsive demand, and different types of storage systems. The stability of such systems will strongly depend on the control strategies attached to the converters. In this context, laboratory-scale setups are becoming the key tools for prototyping and evaluating the performance and robustness of different converter technologies and control strategies. The performance evaluation of control strategies for dynamic frequency support using fast active power regulation (FAPR) requires the urgent development of a suitable power hardware-in-the-loop (PHIL) setup. In this paper, the most prominent emerging types of FAPR are selected and studied: droop-based FAPR, droop derivative-based FAPR, and virtual synchronous power (VSP)-based FAPR. A novel setup for PHIL-based performance evaluation of these strategies is proposed. The setup combines the advanced modeling and simulation functions of a real-time digital simulation platform (RTDS), an external programmable unit to implement the studied FAPR control strategies as digital controllers, and actual hardware. The hardware setup consists of a grid emulator to recreate the dynamic response as seen from the interface bus of the grid side converter of a power electronic-interfaced device (e.g., type-IV wind turbines), and a mockup voltage source converter (VSC, i.e., a device under test (DUT)). The DUT is virtually interfaced to one high-voltage bus of the electromagnetic transient (EMT) representation of a variant of the IEEE 9 bus test system, which has been modified to consider an operating condition with 52% of the total supply provided by wind power generation. The selected and programmed FAPR strategies are applied to the DUT, with the ultimate goal of ascertaining its feasibility and effectiveness with respect to the pure software-based EMT representation performed in real time. Particularly, the time-varying response of the active power injection by each FAPR control strategy and the impact on the instantaneous frequency excursions occurring in the frequency containment periods are analyzed. The performed tests show the degree of improvements on both the rate-of-change-of-frequency (RoCoF) and the maximum frequency excursion (e.g., nadir).


Energies ◽  
2021 ◽  
Vol 14 (3) ◽  
pp. 593
Author(s):  
Moiz Muhammad ◽  
Holger Behrends ◽  
Stefan Geißendörfer ◽  
Karsten von Maydell ◽  
Carsten Agert

With increasing changes in the contemporary energy system, it becomes essential to test the autonomous control strategies for distributed energy resources in a controlled environment to investigate power grid stability. Power hardware-in-the-loop (PHIL) concept is an efficient approach for such evaluations in which a virtually simulated power grid is interfaced to a real hardware device. This strongly coupled software-hardware system introduces obstacles that need attention for smooth operation of the laboratory setup to validate robust control algorithms for decentralized grids. This paper presents a novel methodology and its implementation to develop a test-bench for a real-time PHIL simulation of a typical power distribution grid to study the dynamic behavior of the real power components in connection with the simulated grid. The application of hybrid simulation in a single software environment is realized to model the power grid which obviates the need to simulate the complete grid with a lower discretized sample-time. As an outcome, an environment is established interconnecting the virtual model to the real-world devices. The inaccuracies linked to the power components are examined at length and consequently a suitable compensation strategy is devised to improve the performance of the hardware under test (HUT). Finally, the compensation strategy is also validated through a simulation scenario.


Sign in / Sign up

Export Citation Format

Share Document