The impact of atomic layer deposited SiO2passivation for high-k Ta1−xZrxO on the InP substrate

2015 ◽  
Vol 3 (39) ◽  
pp. 10293-10301 ◽  
Author(s):  
Chandreswar Mahata ◽  
Il-Kwon Oh ◽  
Chang Mo Yoon ◽  
Chang Wan Lee ◽  
Jungmok Seo ◽  
...  
Keyword(s):  
Indium Phosphide ◽  
Gate Dielectric ◽  
Dielectric Film ◽  
Atomic Layer ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Mos Capacitors ◽  
Inp Substrate ◽  
High K ◽  
The Impact

Metal–oxide-semiconductor (MOS) capacitors with an amorphous Ta1−xZrxO composite gate dielectric film and a SiO2passivation layer were fabricated on an indium phosphide (InP) substrate.

scholarly journals Interface Optimization and Transport Modulation of Sm2O3/InP Metal Oxide Semiconductor Capacitors with Atomic Layer Deposition-Derived Laminated Interlayer

Nanomaterials ◽  
2021 ◽  
Vol 11 (12) ◽  
pp. 3443
Author(s):  
Jinyu Lu ◽  
Gang He ◽  
Jin Yan ◽  
Zhenxiang Dai ◽  
Ganhong Zheng ◽  
...  
Keyword(s):  
Atomic Layer Deposition ◽  
Metal Oxide ◽  
Leakage Current ◽  
Gate Dielectric ◽  
Atomic Layer ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Gate Stacks ◽  
Mos Capacitors ◽  
Layer Deposition

In this paper, the effect of atomic layer deposition-derived laminated interlayer on the interface chemistry and transport characteristics of sputtering-deposited Sm2O3/InP gate stacks have been investigated systematically. Based on X-ray photoelectron spectroscopy (XPS) measurements, it can be noted that ALD-derived Al2O3 interface passivation layer significantly prevents the appearance of substrate diffusion oxides and substantially optimizes gate dielectric performance. The leakage current experimental results confirm that the Sm2O3/Al2O3/InP stacked gate dielectric structure exhibits a lower leakage current density than the other samples, reaching a value of 2.87 × 10−6 A/cm2. In addition, conductivity analysis shows that high-quality metal oxide semiconductor capacitors based on Sm2O3/Al2O3/InP gate stacks have the lowest interfacial density of states (Dit) value of 1.05 × 1013 cm−2 eV−1. The conduction mechanisms of the InP-based MOS capacitors at low temperatures are not yet known, and to further explore the electron transport in InP-based MOS capacitors with different stacked gate dielectric structures, we placed samples for leakage current measurements at low varying temperatures (77–227 K). Based on the measurement results, Sm2O3/Al2O3/InP stacked gate dielectric is a promising candidate for InP-based metal oxide semiconductor field-effect-transistor devices (MOSFET) in the future.

Optimized Al-doped TiO2 gate insulator for metal-oxide-semiconductor capacitor on Ge substrate

2021 ◽  
Author(s):  
Dong Gun Kim ◽  
Cheol Hyun An ◽  
Sanghyeon Kim ◽  
Dae Seon Kwon ◽  
Junil Lim ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Leakage Current ◽  
Tio2 Film ◽  
Single Layer ◽  
Atomic Layer ◽  
Metal Oxide Semiconductor ◽  
Gate Insulator ◽  
Oxide Semiconductor ◽  
High K ◽  
Metal Oxide Semiconductor Capacitor

Atomic layer deposited TiO2- and Al2O3-based high-k gate insulator (GI) were examined for the Ge-based metal-oxide-semiconductor capacitor application. The single-layer TiO2 film showed a too high leakage current to be...

Analysis of 3-Dimensional 4H-SiC MOS Capacitors Grown by Atomic Layer Deposition of Al2O3

2018 ◽  
Vol 924 ◽  
pp. 490-493 ◽  
Author(s):  
Muhammad I. Idris ◽  
Nick G. Wright ◽  
Alton B. Horsfall
Keyword(s):  
Atomic Layer Deposition ◽  
Gate Dielectric ◽  
Atomic Layer ◽  
Oxide Semiconductor ◽  
Mos Capacitors ◽  
Mos Capacitor ◽  
3 Dimensional ◽  
Layer Deposition ◽  
Show Evidence ◽  
Flatband Voltage

3-Dimensional 4H-SiC metal-oxide-semiconductor capacitors have been fabricated to determine the effect of the sidewall on the characteristics of 3-Dimentional gate structures. Al2O3 deposited by Atomic Layer Deposition (ALD) was used as the gate dielectric layer on the trench structure. The 3-D MOS capacitors exhibit increasing accumulation capacitance with excellent linearity as the sidewall area increases, indicating that ALD results in a highly conformal dielectric film. The capacitance – voltage characteristics also show evidence of a second flatband voltage, located at a higher bias than that seen for purely planar devices on the same sample. We also observe that the oxide capacitance of planar and 3-D MOS capacitors increases with temperature. Finally, we have found that the 3-D MOS capacitor has a weaker temperature dependence of flatband voltage in comparison to the conventional planar MOS capacitor due to the incorporation of the (1120) plane in the sidewall.

scholarly journals Leakage Current Conduction Mechanism of Au-Pt-Ti/ HfO2-Al2O3/n-InAlAs Metal-Oxide-Semiconductor Capacitor under Reverse-Biased Condition

Coatings ◽  
2019 ◽  
Vol 9 (11) ◽  
pp. 720
Author(s):  
He Guan ◽  
Shaoxi Wang
Keyword(s):  
Metal Oxide ◽  
Leakage Current ◽  
Photoelectron Spectroscopy ◽  
Metal Oxide Semiconductor ◽  
Schottky Emission ◽  
Oxide Semiconductor ◽  
Optimized Design ◽  
Mos Capacitors ◽  
Leakage Mechanism ◽  
High K

Au-Pt-Ti/high-k/n-InAlAs metal-oxide-semiconductor (MOS) capacitors with HfO2-Al2O3 laminated dielectric were fabricated. We found that a Schottky emission leakage mechanism dominates the low bias conditions and Fowler–Nordheim tunneling became the main leakage mechanism at high fields with reverse biased condition. The sample with HfO2 (4 m)/Al2O3 (8 nm) laminated dielectric shows a high barrier height ϕB of 1.66 eV at 30 °C which was extracted from the Schottky emission mechanism, and this can be explained by fewer In–O and As–O states on the interface, as detected by the X-ray photoelectron spectroscopy test. These effects result in HfO2 (4 m)/Al2O3 (8 nm)/n-InAlAs MOS-capacitors presenting a low leakage current density of below 1.8 × 10−7 A/cm2 from −3 to 0 V at 30 °C. It is demonstrated that the HfO2/Al2O3 laminated dielectric with a thicker Al2O3 film of 8 nm is an optimized design to be the high-k dielectric used in Au-Pt-Ti/HfO2-Al2O3/InAlAs MOS capacitor applications.

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