Ordered arrays of a defect-modified ferroelectric polymer for non-volatile memory with minimized energy consumption

Nanoscale ◽  
2014 ◽  
Vol 6 (22) ◽  
pp. 13945-13951 ◽  
Author(s):  
Xiang-Zhong Chen ◽  
Xin Chen ◽  
Xu Guo ◽  
Yu-Shuang Cui ◽  
Qun-Dong Shen ◽  
...  
Keyword(s):  
Energy Consumption ◽  
Ordered Arrays ◽  
Ferroelectric Polymer ◽  
Non Volatile Memory ◽  
Volatile Memory

Control of thin ferroelectric polymer films for non-volatile memory applications

2010 ◽  
Vol 17 (4) ◽  
pp. 1135-1163 ◽  
Author(s):  
Youn Park ◽  
In-sung Bae ◽  
Seok Kang ◽  
Jiyoun Chang ◽  
Cheolmin Park
Keyword(s):  
Polymer Films ◽  
Ferroelectric Polymer ◽  
Non Volatile Memory ◽  
Volatile Memory ◽  
Memory Applications

The flexible non-volatile memory devices using oxide semiconductors and ferroelectric polymer poly(vinylidene fluoride-trifluoroethylene)

2011 ◽  
Vol 99 (1) ◽  
pp. 012901 ◽  
Author(s):  
Gwang-Geun Lee ◽  
Eisuke Tokumitsu ◽  
Sung-Min Yoon ◽  
Yoshihisa Fujisaki ◽  
Joo-Won Yoon ◽  
...  
Keyword(s):  
Vinylidene Fluoride ◽  
Memory Devices ◽  
Oxide Semiconductors ◽  
Ferroelectric Polymer ◽  
Poly Vinylidene Fluoride ◽  
Non Volatile Memory ◽  
Volatile Memory

scholarly journals HEART: H ybrid Memory and E nergy- A ware R eal- T ime Scheduling for Multi-Processor Systems

2021 ◽  
Vol 20 (5s) ◽  
pp. 1-23
Author(s):  
Mario Günzel ◽  
Christian Hakert ◽  
Kuan-Hsun Chen ◽  
Jian-Jia Chen
Keyword(s):  
Energy Consumption ◽  
Real Time ◽  
Shared Memory ◽  
Computing System ◽  
Dynamic Power Management ◽  
Real Time System ◽  
Extensive Evaluation ◽  
Non Volatile Memory ◽  
Volatile Memory ◽  
Memory Architectures

Dynamic power management (DPM) reduces the power consumption of a computing system when it idles, by switching the system into a low power state for hibernation. When all processors in the system share the same component, e.g., a shared memory, powering off this component during hibernation is only possible when all processors idle at the same time. For a real-time system, the schedulability property has to be guaranteed on every processor, especially if idle intervals are considered to be actively introduced. In this work, we consider real-time systems with hybrid shared-memory architectures, which consist of shared volatile memory (VM) and non-volatile memory (NVM). Energy-efficient execution is achieved by applying DPM to turn off all memories during the hibernation mode. Towards this, we first explore the hybrid memory architectures and suggest a task model, which features configurable hibernation overheads. We propose a multi-processor procrastination algorithm (HEART), based on partitioned earliest-deadline-first (pEDF) scheduling. Our algorithm facilitates reducing the energy consumption by actively enlarging the hibernation time. It enforces all processors to idle simultaneously without violating the schedulability condition, such that the system can enter the hibernation state, where shared memories are turned off. Throughout extensive evaluation of HEART, we demonstrate (1) the increase in potential hibernation time, respectively the decrease in energy consumption, and (2) that our algorithm is not only more general but also has better performance than the state of the art with respect to energy efficiency in most cases.

ECC-Based Bit-Write Reduction Code Generation for Non-Volatile Memory

2015 ◽  
Vol E98.A (12) ◽  
pp. 2494-2504 ◽  
Author(s):  
Masashi TAWADA ◽  
Shinji KIMURA ◽  
Masao YANAGISAWA ◽  
Nozomu TOGAWA
Keyword(s):  
Code Generation ◽  
Non Volatile Memory ◽  
Volatile Memory

Integrated low-temperature process for the fabrication of amorphous Si nanoparticles embedded in Al2 O3 for non-volatile memory application

2016 ◽  
Vol 213 (9) ◽  
pp. 2446-2451 ◽  
Author(s):  
Klemens Ilse ◽  
Thomas Schneider ◽  
Johannes Ziegler ◽  
Alexander Sprafke ◽  
Ralf B. Wehrspohn
Keyword(s):  
Low Temperature ◽  
Si Nanoparticles ◽  
Non Volatile Memory ◽  
Amorphous Si ◽  
Volatile Memory ◽  
Low Temperature Process

scholarly journals Secure Boot from Non-Volatile Memory for Programmable SoC Architectures

2020 ◽  
Author(s):  
Franz-Josef Streit ◽  
Florian Fritz ◽  
Andreas Becher ◽  
Stefan Wildermann ◽  
Stefan Werner ◽  
...  
Keyword(s):  
Non Volatile Memory ◽  
Volatile Memory

scholarly journals A Physical Unclonable Function Using a Configurable Tristate Hybrid Scheme With Non-Volatile Memory

2021 ◽  
Vol 2 ◽  
pp. 31-40
Author(s):  
Jiang Li ◽  
Yijun Cui ◽  
Chongyan Gu ◽  
Chenghua Wang ◽  
Weiqiang Liu ◽  
...  
Keyword(s):  
Physical Unclonable Function ◽  
Hybrid Scheme ◽  
Non Volatile Memory ◽  
Volatile Memory

WOBTree: a write-optimized B+-tree for non-volatile memory

2021 ◽  
Vol 15 (5) ◽  
Author(s):  
Haitao Wang ◽  
Zhanhuai Li ◽  
Xiao Zhang ◽  
Xiaonan Zhao ◽  
Song Jiang
Keyword(s):  
Non Volatile Memory ◽  
Volatile Memory
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