X-ray Microscopy Imaging of the Grain Orientation in a Pentacene Field-Effect Transistor

2010 ◽  
Vol 22 (12) ◽  
pp. 3693-3697 ◽  
Author(s):  
Björn Bräuer ◽  
Ajay Virkar ◽  
Stefan C. B. Mannsfeld ◽  
David P. Bernstein ◽  
Roopali Kukreja ◽  
...  
Nano Letters ◽  
2011 ◽  
Vol 11 (7) ◽  
pp. 2875-2880 ◽  
Author(s):  
Nina Hrauda ◽  
Jianjun Zhang ◽  
Eugen Wintersberger ◽  
Tanja Etzelstorfer ◽  
Bernhard Mandl ◽  
...  

2021 ◽  
Author(s):  
Saleh K. Alsaee ◽  
Naser Mahmoud Ahmed ◽  
Elham Mzwd ◽  
Ahmad Fairuz Omar ◽  
A.I. Aljameel ◽  
...  

Abstract In the present work, gold nanoparticles (Au NPs) were synthesized on indium tin oxide (ITO) thin film on glass substrate for the pH sensing application based on extended gate field effect transistor (EGFET). The ITO thin film was deposited on glass using RF sputtering and then the Au NPs were synthesized on it by pulsed laser ablation in liquid (PLAL) technique. The Au NPs were characterized using transmission electron microscope (TEM), field emission scanning electron microscope (FE-SEM), energy dispersive X-ray spectroscopy (EDX), X-ray photoelectron spectroscopy (XPS), and UV-Vis spectroscopic techniques. From the TEM analysis, the size of the spherical shaped Au NPs was found to be in the range of 5–22 nm. The UV-Vis spectroscopy analysis revealed absorption peak at 518 nm, indicating purplish red color. The XPS data revealed Au 4f doublet binding energy peaks of the photoelectrons at 83.79 and 87.45 eV. The current-voltage (I-V) curves indicated pH sensitivities values of 43.6 mV/pH and 0.6 \({\left(\mu A\right)}^{\frac{1}{2}} /pH\) with linear regression of 0.9. The hysteresis and drift characteristics of Au NPs/ITO/G membrane were also studied to investigate its stability and reliability. The results of this work demonstrated that the Au NPs/ITO/G membrane is quite useful for the acidity and basicity detection.


The study aimed at the investigation and application of SnS thin film semiconductor as a channel layer semiconductor in the assembly of an electric double layer field effect transistor which is important for the achievement and development of novel device concepts, applications and tuning of physical properties of materials since the reported EDLFET and the modulation of electronic states have so far been realised on oxides, nitrides, carbon nanotubes and organic semiconductor but has been rarely reported for the chalcogenides. Honey was used as a gel like electrolytic gate dielectric to generate an enhanced electric field response over SnS semiconductor channel layer and due to its ability to produces high on-current and low voltage operation while forming an ionic gel-like solution similar to ionic gels which consist of ionic liguids. SnS gated honey Electric double layer field effect transistor was assembled using tin sulphide (SnS) thin film as semiconductor channel layer and honey as gate dielectric. The measured gate capacitance of honey using LCR meter was measured as 2.15 μF/ cm2 while the dielectric constant is 20.50. The semiconductor layer was deposited using Aerosol assisted chemical vapour deposition and annealed in open air at 250 on an etched region about the middle of a 4×4 mm FTO glass substrate with the source and drain electrode region defined by the etching and masking at the two ends of the substrate. Iridium was used as the gate electrode while a copper wire was masked to the source and drain region to create electrode contact. The Profilometry, X-ray diffraction, Scanning electron microscope, Energy dispersive X-ray spectroscopy, Hall Effect measurement and digital multimeters were used to characterise the device. The SnS thin film was found to be polycrystalline consisting of Sn and S elements with define grains, an optical band of 1.42 eV and of 0.4 μm thickness. The transistor operated with a p type channel conductivity in a depletion mode with a field effect mobility of 16.67 cm2/Vs, cut-off voltage of 1.6 V, Drain saturation current of1.35μA, a transconductance of -809.61 nA/V and a sub threshold slope of -1.6 Vdec-1 which is comparable to standard specifications in Electronics Data sheets. Positive gate bias results in a shift in the cut off voltage due to charge trapping in the channel/dielectric interface.


2014 ◽  
Vol 975 ◽  
pp. 248-253 ◽  
Author(s):  
Miguel Henrique Boratto ◽  
Luis Vicente de Andrade Scalvi ◽  
Diego Henrique de Oliveira Machado

Alumina thin films have been obtained by resistive evaporation of Al layer, followed by thermal oxidation achieved by annealing in appropriate atmosphere (air or O2-rich), with variation of annealing time and temperature. Optical and structural properties of the investigated films reveal that the temperature of 550°C is responsible for fair oxidation. Results of surface electrical resistivity, Raman and infrared spectroscopies are in good agreement with this finding. X-ray and Raman data also suggest the crystallization of Si nuclei at glass substrate-alumina interface, which would come from the soda-lime glass used as substrate. The main goal in this work is the deposition of alumina on top of SnO2 to build a transparent field-effect transistor. Some microscopy results of the assembled SnO2/Al2O3 heterostructure are also shown.


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