Two-Dimensional Polymer Synthesized via Solid-State Polymerization for High-Performance Supercapacitors

ACS Nano ◽  
2017 ◽  
Vol 12 (1) ◽  
pp. 852-860 ◽  
Author(s):  
Wei Liu ◽  
Mani Ulaganathan ◽  
Ibrahim Abdelwahab ◽  
Xin Luo ◽  
Zhongxin Chen ◽  
...  
Nanoscale ◽  
2017 ◽  
Vol 9 (46) ◽  
pp. 18169-18174 ◽  
Author(s):  
Jian Zhu ◽  
Yichun Ding ◽  
Seema Agarwal ◽  
Andreas Greiner ◽  
Hean Zhang ◽  
...  

High performance polybisbenzimidazobenzophenanthroline-dione (BBB) nanofibres are prepared by a novel method of electrospun nanofibre template solid-state polymerization of molecularly self-assembled monomers.


2018 ◽  
Vol 6 (47) ◽  
pp. 24086-24091 ◽  
Author(s):  
Xilian Xu ◽  
Wenhui Shi ◽  
Wenxian Liu ◽  
Shaofeng Ye ◽  
Ruilian Yin ◽  
...  

A simple approach for the preparation of MOF-derived 2D assembled Ni(OH)2–MnO2/C ternary composites, which are used for flexible supercapacitors, is demonstrated.


2017 ◽  
Vol 5 (47) ◽  
pp. 24981-24988 ◽  
Author(s):  
Yao Lu ◽  
La Li ◽  
Di Chen ◽  
Guozhen Shen

A rational design to fabricate two-dimensional (2D) Co3O4@NiCo2O4 architectures composed of nanowires on a Ni foam substrate has been proposed.


2021 ◽  
Vol 482 ◽  
pp. 228987
Author(s):  
Congpu Mu ◽  
Xiaohui Sun ◽  
Yukai Chang ◽  
Fusheng Wen ◽  
Anmin Nie ◽  
...  

2017 ◽  
Author(s):  
Varun Bheemireddy

The two-dimensional(2D) materials are highly promising candidates to realise elegant and e cient transistor. In the present letter, we conjecture a novel co-planar metal-insulator-semiconductor(MIS) device(capacitor) completely based on lateral 2D materials architecture and perform numerical study of the capacitor with a particular emphasis on its di erences with the conventional 3D MIS electrostatics. The space-charge density features a long charge-tail extending into the bulk of the semiconductor as opposed to the rapid decay in 3D capacitor. Equivalently, total space-charge and semiconductor capacitance densities are atleast an order of magnitude more in 2D semiconductor. In contrast to the bulk capacitor, expansion of maximum depletion width in 2D semiconductor is observed with increasing doping concentration due to lower electrostatic screening. The heuristic approach of performance analysis(2D vs 3D) for digital-logic transistor suggest higher ON-OFF current ratio in the long-channel limit even without third dimension and considerable room to maximise the performance of short-channel transistor. The present results could potentially trigger the exploration of new family of co-planar at transistors that could play a signi significant role in the future low-power and/or high performance electronics.<br>


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