Synthesis of Wafer-Scale Monolayer WS2 Crystals toward the Application in Integrated Electronic Devices

2019 ◽  
Vol 11 (21) ◽  
pp. 19381-19387 ◽  
Author(s):  
Jiajun Chen ◽  
Kai Shao ◽  
Weihuang Yang ◽  
Weiqing Tang ◽  
Jiangpeng Zhou ◽  
...  
Keyword(s):  
Electronic Devices ◽  
Wafer Scale

Wafer-scale, highly uniform, and well-arrayed suspended nanostructures for enhancing the performance of electronic devices

Nanoscale ◽  
2022 ◽  
Author(s):  
Zhi-Jun Zhao ◽  
Junseong Ahn ◽  
Dongheon Lee ◽  
Chan Bae Jeong ◽  
Mingu Kang ◽  
...  
Keyword(s):  
Electronic Devices ◽  
Diverse Group ◽  
Wafer Scale ◽  
Highly Uniform

Suspended nanostructures play an important role in enhancing the performance of a diverse group of nanodevices. However, realizing a good arrangement and suspension for nanostructures of various shapes remains a...

Electronic Devices and Circuits Based on Wafer‐Scale Polycrystalline Monolayer MoS 2 by Chemical Vapor Deposition

2019 ◽  
Vol 5 (8) ◽  
pp. 1900393 ◽  
Author(s):  
Lin Wang ◽  
Li Chen ◽  
Swee Liang Wong ◽  
Xin Huang ◽  
Wugang Liao ◽  
...  
Keyword(s):  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Electronic Devices ◽  
Chemical Vapor ◽  
Wafer Scale

Wafer-Scale Two-Dimensional MoS2 Layers Integrated on Cellulose Substrates Toward Environmentally Friendly Transient Electronic Devices

2020 ◽  
Vol 12 (22) ◽  
pp. 25200-25210 ◽  
Author(s):  
Changhyeon Yoo ◽  
Md Golam Kaium ◽  
Luis Hurtado ◽  
Hao Li ◽  
Sushant Rassay ◽  
...  
Keyword(s):  
Electronic Devices ◽  
Environmentally Friendly ◽  
Two Dimensional ◽  
Wafer Scale ◽  
Cellulose Substrates

Draw Spinning of Wafer-Scale Oxide Fibers for Electronic Devices

2018 ◽  
Vol 4 (6) ◽  
pp. 1700644 ◽  
Author(s):  
Ao Liu ◽  
Huihui Zhu ◽  
Guoxia Liu ◽  
Yong-Young Noh ◽  
Elvira Fortunato ◽  
...  
Keyword(s):  
Electronic Devices ◽  
Wafer Scale

HED-TIE: A wafer-scale approach for fabricating hybrid electronic devices with trench isolated electrodes

2017 ◽  
Vol 28 (19) ◽  
pp. 195303 ◽  
Author(s):  
Sreetama Banerjee ◽  
Daniel Bülz ◽  
Dmytro Solonenko ◽  
Danny Reuter ◽  
Carsten Deibel ◽  
...  
Keyword(s):  
Electronic Devices ◽  
Wafer Scale

Atom-probe analysis of the solid-liquid interface

1995 ◽  
Vol 53 ◽  
pp. 676-677
Author(s):  
J.A. Panitz
Keyword(s):  
Molecular Level ◽  
Selective Adsorption ◽  
Electronic Devices ◽  
Atom Probe ◽  
Chemical Agent ◽  
Hostile Environment ◽  
Solid Interface ◽  
Solid Liquid Interface ◽  
Solid Liquid ◽  
Chemically Selective

The first few atomic layers of a solid can form a barrier between its interior and an often hostile environment. Although adsorption at the vacuum-solid interface has been studied in great detail, little is known about adsorption at the liquid-solid interface. Adsorption at a liquid-solid interface is of intrinsic interest, and is of technological importance because it provides a way to coat a surface with monolayer or multilayer structures. A pinhole free monolayer (with a reasonable dielectric constant) could lead to the development of nanoscale capacitors with unique characteristics and lithographic resists that surpass the resolution of their conventional counterparts. Chemically selective adsorption is of particular interest because it can be used to passivate a surface from external modification or change the wear and the lubrication properties of a surface to reflect new and useful properties. Immunochemical adsorption could be used to fabricate novel molecular electronic devices or to construct small, “smart”, unobtrusive sensors with the potential to detect a wide variety of preselected species at the molecular level. These might include a particular carcinogen in the environment, a specific type of explosive, a chemical agent, a virus, or even a tumor in the human body.

Study of dislocation loops in Arsenic-Rich as-grown GaAs

1987 ◽  
Vol 45 ◽  
pp. 350-351
Author(s):  
Byung-Teak Lee
Keyword(s):  
Point Defects ◽  
Electronic Devices ◽  
Arsenic Concentration ◽  
Stoichiometric Compound ◽  
Dislocation Loops ◽  
Gaas Crystal ◽  
Ion Milling ◽  
Transmission Electron ◽  
Arsenic Source ◽  
High Arsenic

Grown-in dislocations in GaAs have been a major obstacle in utilizing this material for the potential electronic devices. Although it has been proposed in many reports that supersaturation of point defects can generate dislocation loops in growing crystals and can be a main formation mechanism of grown-in dislocations, there are very few reports on either the observation or the structural analysis of the stoichiometry-generated loops. In this work, dislocation loops in an arsenic-rich GaAs crystal have been studied by transmission electron microscopy.The single crystal with high arsenic concentration was grown using the Horizontal Bridgman method. The arsenic source temperature during the crystal growth was about 630°C whereas 617±1°C is normally believed to be optimum one to grow a stoichiometric compound. Samples with various orientations were prepared either by chemical thinning or ion milling and examined in both a JEOL JEM 200CX and a Siemens Elmiskop 102.

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