Controllable Threshold Voltage in Organic Complementary Logic Circuits with an Electron-Trapping Polymer and Photoactive Gate Dielectric Layer

2016 ◽  
Vol 8 (28) ◽  
pp. 18249-18255 ◽  
Author(s):  
Toan Thanh Dao ◽  
Heisuke Sakai ◽  
Hai Thanh Nguyen ◽  
Kei Ohkubo ◽  
Shunichi Fukuzumi ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Dielectric Layer ◽  
Gate Dielectric ◽  
Logic Circuits ◽  
Electron Trapping

scholarly journals Pentacene Active Channel Layers Prepared by Spin-Coating and Vacuum Evaporation Using Soluble Precursors for OFET Applications

2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
Shizuyasu Ochiai ◽  
Kumar Palanisamy ◽  
Santhakumar Kannappan ◽  
Paik-Kyun Shin
Keyword(s):  
Thin Film ◽  
Threshold Voltage ◽  
Spin Coating ◽  
Dielectric Layer ◽  
Gate Dielectric ◽  
Low Cost ◽  
Vacuum Evaporation ◽  
Large Area ◽  
Process Technology ◽  
Active Channel

Pentacene OFETs of bottom-gate/bottom-contact were fabricated with three types of pentacene organic semiconductors and cross linked Poly(4-vinylphenol) or polycarbonate as gate dielectric layer. Two different processes were used to prepare the pentacene active channel layers: (1) spin-coating on dielectric layer using two different soluble pentacene precursors of SAP and DMP; (2) vacuum evaporation on PC insulator. X-ray diffraction studies revealed coexistence of thin film and bulk phase of pentacene from SAP and thin film phase of pentacene from DMP precursors. The field effect mobility of 0.031 cm2/Vs and threshold voltage of −12.5 V was obtained from OFETs fabricated from SAP precursor, however, the pentacene OFETs from DMP under same preparation yielded high mobility of 0.09 cm2/Vs and threshold value decreased to −5 V. It reflects that the mixed phase films had carrier mobilities inferior to films consisting solely of single phase. For comparison, we have also fabricated pentacene OFETs by vacuum evaporation on polycarbonate as the gate dielectric and obtained charge carrier mobilities as large as 0.62 cm2/Vs and threshold voltage of −8.5 V. We demonstrated that the spin-coated pentacene using soluble pentacene precursors could be alternative process technology for low cost, large area and low temperature fabrication of OFETs.

Double‐Gate MoS 2 Field‐Effect Transistors with Full‐Range Tunable Threshold Voltage for Multifunctional Logic Circuits

2021 ◽  
pp. 2101036
Author(s):  
Jiali Yi ◽  
Xingxia Sun ◽  
Chenguang Zhu ◽  
Shengman Li ◽  
Yong Liu ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Full Range ◽  
Logic Circuits ◽  
Double Gate

scholarly journals Analysis of Threshold Voltage Shift for Full VGS/VDS/Oxygen-Content Span under Positive Bias Stress in Bottom-Gate Amorphous InGaZnO Thin-Film Transistors

Micromachines ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 327
Author(s):  
Je-Hyuk Kim ◽  
Jun Tae Jang ◽  
Jong-Ho Bae ◽  
Sung-Jin Choi ◽  
Dong Myong Kim ◽  
...  
Keyword(s):  
Thin Film ◽  
Electric Field ◽  
Oxygen Content ◽  
Threshold Voltage ◽  
Thin Film Transistors ◽  
Electron Trapping ◽  
Threshold Voltage Shift ◽  
Voltage Shift ◽  
Drain Side ◽  
Bottom Gate

In this study, we analyzed the threshold voltage shift characteristics of bottom-gate amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) under a wide range of positive stress voltages. We investigated four mechanisms: electron trapping at the gate insulator layer by a vertical electric field, electron trapping at the drain-side GI layer by hot-carrier injection, hole trapping at the source-side etch-stop layer by impact ionization, and donor-like state creation in the drain-side IGZO layer by a lateral electric field. To accurately analyze each mechanism, the local threshold voltages of the source and drain sides were measured by forward and reverse read-out. By using contour maps of the threshold voltage shift, we investigated which mechanism was dominant in various gate and drain stress voltage pairs. In addition, we investigated the effect of the oxygen content of the IGZO layer on the positive stress-induced threshold voltage shift. For oxygen-rich devices and oxygen-poor devices, the threshold voltage shift as well as the change in the density of states were analyzed.

Effect of High Temperature Forming Gas Annealing on Electrical Properties of 4H-SiC Lateral MOSFETs with Lanthanum Silicate and ALD SiO2 Gate Dielectric

2018 ◽  
Vol 924 ◽  
pp. 482-485
Author(s):  
Min Seok Kang ◽  
Kevin Lawless ◽  
Bong Mook Lee ◽  
Veena Misra
Keyword(s):  
Threshold Voltage ◽  
Interfacial Layer ◽  
Field Effect ◽  
Lanthanum Oxide ◽  
Gate Dielectric ◽  
High Mobility ◽  
High Threshold ◽  
Field Effect Mobility ◽  
The Impact ◽  
Lanthanum Silicate

We investigated the impact of an initial lanthanum oxide (La2O3) thickness and forming gas annealing (FGA) conditions on the MOSFET performance. The FGA has been shown to dramatically improve the threshold voltage (VT) stability of 4H-SiC MOSFETs. The FGA process leads to low VTshift and high field effect mobility due to reduction of the interface states density as well as traps by passivating the dangling bonds and active traps in the Lanthanum Silicate dielectrics. By optimizing the La2O3interfacial layer thickness and FGA condition, SiC MOSFETs with high threshold voltage and high mobility while maintaining minimal VTshift are realized.

scholarly journals Impact of Hydrogen Bonds Limited Dipolar Disorder in High-k Polymer Gate Dielectric on Charge Carrier Transport in OFET

Polymers ◽  
2020 ◽  
Vol 12 (4) ◽  
pp. 826
Author(s):  
Bartosz Paruzel ◽  
Jiří Pfleger ◽  
Jiří Brus ◽  
Miroslav Menšík ◽  
Francesco Piana ◽  
...  
Keyword(s):  
Hydrogen Bonds ◽  
Charge Carrier ◽  
Charge Transport ◽  
Density Of States ◽  
Dielectric Layer ◽  
Carrier Transport ◽  
Gate Dielectric ◽  
Field Effect Transistors ◽  
Semiconductor Layer ◽  
High K

The paper contributes to the characterization and understanding the mutual interactions of the polar polymer gate dielectric and organic semiconductor in organic field effect transistors (OFETs). It has been shown on the example of cyanoethylated polyvinylalcohol (CEPVA), the high-k dielectric containing strong polar side groups, that the conditions during dielectric layer solidification can significantly affect the charge transport in the semiconductor layer. In contrast to the previous literature we attributed the reduced mobility to the broader distribution of the semiconductor density of states (DOS) due to a significant dipolar disorder in the dielectric layer. The combination of infrared (IR), solid-state nuclear magnetic resonance (NMR) and broadband dielectric (BDS) spectroscopy confirmed the presence of a rigid hydrogen bonds network in the CEPVA polymer. The formation of such network limits the dipolar disorder in the dielectric layer and leads to a significantly narrowed distribution of the density of states (DOS) and, hence, to the higher charge carrier mobility in the OFET active channel made of 6,13-bis(triisopropylsilylethynyl)pentacene. The low temperature drying process of CEPVA dielectric results in the decreased energy disorder of transport states in the adjacent semiconductor layer, which is then similar as in OFETs equipped with the much less polar poly(4-vinylphenol) (PVP). Breaking hydrogen bonds at temperatures around 50 °C results in the gradual disintegration of the stabilizing network and deterioration of the charge transport due to a broader distribution of DOS.

Research on Threshold Voltage Instability in SiC MOSFET Devices with Precision Measurement

2019 ◽  
Vol 954 ◽  
pp. 133-138
Author(s):  
Ao Liu ◽  
Song Bai ◽  
Run Hua Huang ◽  
Tong Tong Yang ◽  
Hao Liu
Keyword(s):  
Threshold Voltage ◽  
Precision Measurement ◽  
Gate Dielectric ◽  
Interface Traps ◽  
Gate Bias ◽  
Threshold Voltage Shift ◽  
Experimental Platform ◽  
Bias Stress ◽  
Voltage Instability ◽  
Voltage Drift

The mechanism of threshold voltage shift was studied. It is believed that the instability in threshold voltage during gate bias stress is due to capture of electrons by the SiC/gate dielectric interface traps and the gate dielectric near interface traps. New experimental platform was designed and built successfully. When positive stress or negative stress is applied to the gate, the change of threshold voltage occur immediately. After stress removal, the recovery of the threshold voltage occur soon. The change and recovery of threshold voltage are very sensitive to time. In order to get accurate threshold voltage drift data after high-temperature gate bias experiment, test of threshold voltage must be carried out immediately after the experiment.

A flexible magnetoelectric field-effect transistor with magnetically responsive nanohybrid gate dielectric layer

Nano Research ◽  
2015 ◽  
Vol 8 (10) ◽  
pp. 3421-3429 ◽  
Author(s):  
Nguyen Minh Triet ◽  
Tran Quang Trung ◽  
Nguyen Thi Dieu Hien ◽  
Saqib Siddiqui ◽  
Do-Il Kim ◽  
...  
Keyword(s):  
Dielectric Layer ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Gate Dielectric ◽  
Effect Transistor
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