High-precision digital acquisition using a low-resolution analog-to-digital converter

1970 ◽  
Vol 42 (12) ◽  
pp. 1466-1467 ◽  
Author(s):  
Stanley N. Deming ◽  
Harry L. Pardue

This paper analyzes the Digital Pre-Distortion linearization technique using a low-precision Analog-to-Digital Converter (ADC). The output of a power amplifier exhibits various spurious emissions, spectral regrowth and intermodulation distortion (IMD) products due to its non-linear behavior. So, to preserve the performance of power amplifier, linearization becomes mandatory. Digital Pre-Distortion does the training on the output of the power amplifier (distorted signal) and generates exactly the inverse characteristics to that of power amplifier. Their cascading results into a linear response. In practical systems, the output of power amplifier has to go through an analog-to-digital converter for digital processing and a low-resolution ADC results in the degradation of the signal and affects the DPD performance. But a low-resolution ADC not only reduces the computational complexity in the digital processing but it also provides lower power consumption and costs less because less hardware would be required. In this work, the aim is to find the precision up to which ADC resolution can be reduced without affecting the DPD performance in a significant manner. This paper evaluates the performance of two DPD systems - Full-band DPD and Sub-band DPD and from simulations, it is observed that for a full-band DPD, 1-bit ADC can be reliably used and for a sub-band DPD, single bit to 4-bits ADC can be used.


2019 ◽  
Vol 29 (05) ◽  
pp. 2050083 ◽  
Author(s):  
Bo Yu ◽  
Yi-Fei Pu ◽  
Qiu-Yan He

The dual-slope integral analog-to-digital converter is widely used in low-speed, high-precision measurement owing to its high precision and strong resistance on crosstalk interference. To meet the requirements of higher accuracy and faster measurement, the integral sensitivity and conversion speed of the dual-slope integral analog-to-digital converter must be improved. Therefore, based on fractional-order calculus, we propose a fractional-order dual-slope integral analog-to-digital converter. First, constant-current charging curves were provided to explain the source of the idea of the fractional-order dual-slope integral analog-to-digital converter. Then, the working principle of the fractional-order dual-slope integral analog-to-digital converter is described in detail. The calculation formula of analog-to-digital conversion is derived and analyzed. Moreover, the relationship of the voltage-measurement error with the operation-order error of the fractor and the reference voltage error is theoretically derived. Furthermore, we theoretically analyze the resistance of the proposed analog-to-digital converter to crosstalk interference, as well as the requirements for the first fractional integral time when crosstalk interference is suppressed. Specifically, we prove that the proposed analog-to-digital converter has a higher sensitivity and conversion speed than the classical converter, and we provide a quantitative calculation formula.


2008 ◽  
Vol 79 (10) ◽  
pp. 103503 ◽  
Author(s):  
E. T. Subramaniam ◽  
Mamta Jain ◽  
R. K. Bhowmik ◽  
Michel Tripon

1963 ◽  
Vol 17 (9) ◽  
pp. 535-543,549
Author(s):  
Shintaro Oshima ◽  
Hazime Enomoto ◽  
Kitsutaro Amano ◽  
Tsuneo Araki ◽  
Hisao Taziri ◽  
...  

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