Performance evaluation of a third-order LADF sigma–delta (Σ–Δ) modulator via FPGA implementation

2007 ◽  
Vol 87 (1) ◽  
pp. 162-176 ◽  
Author(s):  
Saman S. Abeysekera ◽  
Charayaphan Charoensak
Keyword(s):  
Performance Evaluation ◽  
Fpga Implementation ◽  
Third Order ◽  
Sigma Delta

Stable boundaries of a third-order sigma-delta modulator

2003 ◽  
Author(s):  
J. Zhang ◽  
P.V. Brennan ◽  
D. Jiang ◽  
E. Vinogradova ◽  
P.D. Smith
Keyword(s):  
Third Order ◽  
Sigma Delta Modulator ◽  
Sigma Delta

Design of Third-Order Single-Loop Full Feed-Forward Sigma Delta Modulator

2014 ◽  
Vol 609-610 ◽  
pp. 1176-1180
Author(s):  
Liang Liu ◽  
Song Chen ◽  
Chong He ◽  
Liang Yin ◽  
Xiao Wei Liu
Keyword(s):  
Model Building ◽  
Inertial Sensors ◽  
Sampling Rate ◽  
Third Order ◽  
Sigma Delta Modulator ◽  
Sigma Delta ◽  
Feed Forward ◽  
Single Loop ◽  
Local Feedback ◽  
Sigma Delta Adc

Sigma Delta modulator is widely used in ADC for kinds of micro inertial sensors, Sigma Delta ADC can be easily integrated with digital circuits. It possesses some performances of good linearity and high accuracy, while it has no such strict requirements for the match of device dimensions. In this paper, the design of third-order Sigma Delta modulator with a structure of single-loop full feed-forward is accomplished, meanwhile it uses local feedback for zero optimization to improve the shaping capacity of the modulator noise within the signal bandwidth. The OSR (over-sampling rate) of the modulator is 128 and the signal bandwidth is 10 kHz. By the system model building and simulation in the Simulink of MATALAB, the SNR is 96.3 dB and the ENOB is 15.71 bits. Then the modulator is implemented into transistor-level circuits with 0.5um process, by the simulation in Spectre of Cadence, the SNR is 88.5 dB and the ENOB is 14.41 bits. 搜

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