scholarly journals Power Efficiency Maximization of an RF Energy Harvester by Fine-tuning an L-matching Network and the Load

2015 ◽  
Vol 120 ◽  
pp. 655-658 ◽  
Author(s):  
Josep Jordana ◽  
Ferran Reverter ◽  
Manel Gasulla
2016 ◽  
Vol 8 (3) ◽  
pp. 405-413 ◽  
Author(s):  
Ludvine Fadel ◽  
Laurent Oyhenart ◽  
Romain Bergès ◽  
Valérie Vigneras ◽  
Thierry Taris

This paper presents the development of two dual-band radio-frequency (RF) harvesters optimized to convert far-field RF energy to DC voltage at very low received power. The first one is based on a patch antenna and the second on a dipole antenna. They are both implemented on a standard FR4 substrate with commercially off-the-shelf devices. The two RF harvesters provide a rectified voltage of 1 V for a combined power, respectively, of −19.5 dBm at 915 MHz, −25 dBm at 2.44 GHz, of −20 dBm at 915 MHz, and −15 dBm at 2.44 GHz. The remote powering of a clock consuming 1 V/5 µA is demonstrated, and the rectenna yields a power efficiency of 12%.


Energies ◽  
2018 ◽  
Vol 11 (5) ◽  
pp. 1258 ◽  
Author(s):  
Danial Khan ◽  
Hamed Abbasizadeh ◽  
Sang-Yun Kim ◽  
Zaffar Khan ◽  
Syed Shah ◽  
...  

2014 ◽  
Vol 2014 ◽  
pp. 1-11 ◽  
Author(s):  
Mohammad Reza Shokrani ◽  
Mojtaba Khoddam ◽  
Mohd Nizar B. Hamidon ◽  
Noor Ain Kamsani ◽  
Fakhrul Zaman Rokhani ◽  
...  

This paper presents a new type diode connected MOS transistor to improve CMOS conventional rectifier's performance in RF energy harvester systems for wireless sensor networks in which the circuits are designed in 0.18 μm TSMC CMOS technology. The proposed diode connected MOS transistor uses a new bulk connection which leads to reduction in the threshold voltage and leakage current; therefore, it contributes to increment of the rectifier’s output voltage, output current, and efficiency when it is well important in the conventional CMOS rectifiers. The design technique for the rectifiers is explained and a matching network has been proposed to increase the sensitivity of the proposed rectifier. Five-stage rectifier with a matching network is proposed based on the optimization. The simulation results shows 18.2% improvement in the efficiency of the rectifier circuit and increase in sensitivity of RF energy harvester circuit. All circuits are designed in 0.18 μm TSMC CMOS technology.


2019 ◽  
Vol 54 (9) ◽  
pp. 2601-2613 ◽  
Author(s):  
Zizhen Zeng ◽  
Shanpu Shen ◽  
Xiaopeng Zhong ◽  
Xing Li ◽  
Chi-Ying Tsui ◽  
...  

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