Cutting of polished single-crystal silicon by wire electrical discharge machining

2004 ◽  
Vol 28 (3) ◽  
pp. 314-319 ◽  
Author(s):  
Hideo Takino ◽  
Toshimitsu Ichinohe ◽  
Katsunori Tanimoto ◽  
Syuichi Yamaguchi ◽  
Kazushi Nomura ◽  
...  
2007 ◽  
Vol 31 (4) ◽  
pp. 358-363 ◽  
Author(s):  
Hideo Takino ◽  
Toshimitsu Ichinohe ◽  
Katsunori Tanimoto ◽  
Kazushi Nomura ◽  
Masanori Kunieda

2005 ◽  
Vol 29 (4) ◽  
pp. 423-430 ◽  
Author(s):  
Hideo Takino ◽  
Toshimitsu Ichinohe ◽  
Katsunori Tanimoto ◽  
Syuichi Yamaguchi ◽  
Kazushi Nomura ◽  
...  

2021 ◽  
Vol 2021 ◽  
pp. 1-13
Author(s):  
Bin Xin ◽  
Wei Liu

During the wire electrical discharge machining (WEDM) process, a large number of discharge pits and a recast layer are easily generated on the workpiece surface, resulting in high surface roughness. A discharge forming cutting-electrochemical machining method for fabricating single-crystal silicon is proposed in this study to solve this problem. On the same processing equipment, single-crystal silicon is first cut using the discharge forming cutting method. Second, electrochemical anodic reaction technology is used to dissolve the discharge pits and recast layer on the single-crystal silicon surface. The machining mechanism of this process, the surface elements of the processed single-crystal silicon and a comparison of the kerf width are analyzed through experiments. On this basis, the influence of the movement speed of the copper foil electrode during electrochemical anodic dissolution on the final surface roughness is qualitatively analyzed. The experimental results show that discharge forming cutting-electrochemical machining can effectively eliminate the electrical discharge pits and recast layer, which are caused by electric discharge cutting, on the surface of single-crystal silicon, thereby reducing the surface roughness of the workpiece.


Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.


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