scholarly journals LP-HLS: Automatic power-intent generation for high-level synthesis based hardware implementation flow

2017 ◽  
Vol 50 ◽  
pp. 26-38 ◽  
Author(s):  
Affaq Qamar ◽  
Fahad Bin Muslim ◽  
Javed Iqbal ◽  
Luciano Lavagno
Keyword(s):  
Hardware Implementation ◽  
High Level Synthesis ◽  
High Level

A hardware implementation for real-time lane detection using high-level synthesis

2018 ◽  
Author(s):  
Chanon Khongprasongsiri ◽  
Pinit Kumhom ◽  
Watcharapan Suwansantisuk ◽  
Teerasak Chotikawanid ◽  
Surachate Chumpol ◽  
...  
Keyword(s):  
Real Time ◽  
Hardware Implementation ◽  
Lane Detection ◽  
High Level Synthesis ◽  
High Level

High-Level Synthesis for Low Power Hardware Implementation of Unscheduled Data-Dominated Circuits

2005 ◽  
Vol 1 (3) ◽  
pp. 259-272 ◽  
Author(s):  
Xiaoyong Tang ◽  
Tianyi Jiang ◽  
Alex K. Jones ◽  
Prithviraj Banerjee
Keyword(s):  
Low Power ◽  
Hardware Implementation ◽  
High Level Synthesis ◽  
High Level

High-level synthesis hardware implementation and verification of HEVC DCT on SoC-FPGA

2017 ◽  
Author(s):  
Belal Mohamed ◽  
Amr Elsayed ◽  
Omar Amin ◽  
Eslam Khafagy ◽  
Maher Abdelrasoul ◽  
...  
Keyword(s):  
Hardware Implementation ◽  
High Level Synthesis ◽  
High Level
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