error detection and correction system

Error Detection and Correction System (EDAC) of On Board Data Handling (OBDH) in Real Time Operating System Behaviour

Scientific Research Journal ◽

10.24191/srj.v10i2.5412 ◽

2019 ◽

Vol 10 (2) ◽

pp. 17

Author(s):

Haryono Haryono ◽

Agfianto Eko Putra ◽

Jazi Eko Istiyanto ◽

Agus Harjoko

Keyword(s):

Operating System ◽

Real Time ◽

Error Detection ◽

Data Handling ◽

System Error ◽

Real Time Operating System ◽

The Core ◽

Core Function ◽

Error Detection And Correction ◽

Correction System

The satellite requires the support of a robust sub system. On Board Data Handling (OBDH) is the core function of the satellite subsystem and has to be error free in managing the operation of the satellite. It should withstand the harsh environmental conditions in space that has a lot of hazards caused by radiations. In view of these two conditions, the OBDH design should be able to manage the operation and overcome the hazards of radiation. In order to manage the operation Real Time Operating System (RTOS) was applied. RTOS was able to manage the task efficiently and effectively. In the aerospace domain, RTOS has become popular because of its strength in managing the operating system. Error Detection and Correction System (EDAC) system was applied to make OBDH more robust. This paper discusses the implementation of the EDAC system in tandem with the RTOS behaviour to manage the operation and increase the robustness of the system. The findings show that OBDH can be programmed successfully using RTOS to handle critical and robust operations.

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Design of High-Speed Decoder for New High-Speed Bus

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.20-23.958 ◽

2010 ◽

Vol 20-23 ◽

pp. 958-962

Author(s):

Wei Gong Zhang ◽

Bo Yang ◽

Rui Ding ◽

Yong Qin Hu

Keyword(s):

Error Correction ◽

Intelligent Control ◽

Error Detection ◽

High Speed ◽

Critical Path ◽

Speed Error ◽

Error Detection And Correction ◽

Traditional Algorithm ◽

New Type ◽

Correction System

This paper presents a new type of high-speed error correction for the requirements of new high-Speed Bus. Use RS (255, 239). Not only optimization traditional algorithm, but also design bidirectional synchronous calculated adjoint form module, Fast B-M algorithm module. and full parallel Chien Search module. These design used in new high-Speed Bus, Larger than usual decoder designed to significantly shorten the critical path decoding, and achieve continuous decoding. In addition, this error correction system separated error detection and correction module modules, And after error detection module add intelligent control, which reduced the complexity and power consumption of equipment. The error correction system design for the requirements of the new bus which speed is above 400m / s.

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