Efficient and scalable logical busses for message-passing interconnection Networks

2005 ◽  
pp. 183-192
Author(s):  
H. Scheidig ◽  
M. F. Schneider ◽  
R. Spurk
Keyword(s):  
Interconnection Networks ◽  
Message Passing

FORMAL PROOF OF APPLICATIONS DISTRIBUTED IN SYMMETRIC INTERCONNECTION NETWORKS

2003 ◽  
Vol 13 (01) ◽  
pp. 3-18 ◽  
Author(s):  
ERIC GASCARD ◽  
LAURENCE PIERRE
Keyword(s):  
Interconnection Networks ◽  
Message Passing ◽  
Distributed Memory ◽  
Cayley Graphs ◽  
Formal Proof ◽  
Parallel Programs ◽  
Theorem Prover ◽  
Large Set ◽  
Compositional Approach ◽  
Application Programs

This paper focuses on the formal proof of parallel programs dedicated to distributed memory symmetric interconnection networks; communications are realized by message passing. We have developed a method to formally verify the computational correctness of this kind of application. Using the notion of Cayley graphs to model the networks in the Nqthm theorem prover, we have formally specified and mechanically proven correct a large set of collective communication primitives. Our compositional approach allows us to reuse these libraries of pre-proven procedures to validate complex application programs within Nqthm. This is illustrated by three examples.

AN OPTIMAL NEIGHBOURHOOD BROADCASTING SCHEME FOR STAR INTERCONNECTION NETWORKS

2003 ◽  
Vol 04 (01) ◽  
pp. 103-112 ◽  
Author(s):  
I. M. MKWAWA ◽  
D. D. KOUVATSOS
Keyword(s):  
Upper Bound ◽  
Interconnection Networks ◽  
Message Passing ◽  
Single Port ◽  
Optimal Scheme ◽  
Graph Theoretic ◽  
Half Duplex ◽  
Binomial Trees

A novel and efficient neighbourhood broadcasting scheme is proposed for star interconnection networks, based on binomial trees and graph theoretic concepts. The optimal scheme has an upper bound of 1.33⌈log2(n - 2)⌉ + O(1) time steps and it is applicable to both single-port and half-duplex modes of message passing communication.

Message Passing Neural Networks for Partial Charge Assignment to Metal-Organic Frameworks

2020 ◽  
Author(s):  
Ali Raza ◽  
Arni Sturluson ◽  
Cory Simon ◽  
Xiaoli Fern
Keyword(s):  
Electronic Structure ◽  
Message Passing ◽  
Gas Adsorption ◽  
Metal Organic Frameworks ◽  
Computational Cost ◽  
Electronic Structure Calculations ◽  
High Fidelity ◽  
Partial Charges ◽  
Metal Organic ◽  
Structure Calculations

Virtual screenings can accelerate and reduce the cost of discovering metal-organic frameworks (MOFs) for their applications in gas storage, separation, and sensing. In molecular simulations of gas adsorption/diffusion in MOFs, the adsorbate-MOF electrostatic interaction is typically modeled by placing partial point charges on the atoms of the MOF. For the virtual screening of large libraries of MOFs, it is critical to develop computationally inexpensive methods to assign atomic partial charges to MOFs that accurately reproduce the electrostatic potential in their pores. Herein, we design and train a message passing neural network (MPNN) to predict the atomic partial charges on MOFs under a charge neutral constraint. A set of ca. 2,250 MOFs labeled with high-fidelity partial charges, derived from periodic electronic structure calculations, serves as training examples. In an end-to-end manner, from charge-labeled crystal graphs representing MOFs, our MPNN machine-learns features of the local bonding environments of the atoms and learns to predict partial atomic charges from these features. Our trained MPNN assigns high-fidelity partial point charges to MOFs with orders of magnitude lower computational cost than electronic structure calculations. To enhance the accuracy of virtual screenings of large libraries of MOFs for their adsorption-based applications, we make our trained MPNN model and MPNN-charge-assigned computation-ready, experimental MOF structures publicly available.<br>

Building Attention and Edge Convolution Neural Networks for Bioactivity and Physical-Chemical Property Prediction

2019 ◽  
Author(s):  
Michael Withnall ◽  
Edvard Lindelöf ◽  
Ola Engkvist ◽  
Hongming Chen
Keyword(s):  
Message Passing ◽  
State Of The Art ◽  
A Priori ◽  
Model Performance ◽  
Learning Approaches ◽  
Physical Chemical ◽  
Chemical Descriptor ◽  
Derived Properties ◽  
Memory Schemes ◽  
Hyperparameter Selection

We introduce Attention and Edge Memory schemes to the existing Message Passing Neural Network framework for graph convolution, and benchmark our approaches against eight different physical-chemical and bioactivity datasets from the literature. We remove the need to introduce <i>a priori</i> knowledge of the task and chemical descriptor calculation by using only fundamental graph-derived properties. Our results consistently perform on-par with other state-of-the-art machine learning approaches, and set a new standard on sparse multi-task virtual screening targets. We also investigate model performance as a function of dataset preprocessing, and make some suggestions regarding hyperparameter selection.

Efficient Instruction and Data Caching for High Performance Embedded Processors

1970 ◽  
pp. 9
Author(s):  
A. Ferrerón Labari ◽  
D. Suárez Gracia ◽  
V. Viñals Yúfera
Keyword(s):  
Embedded Systems ◽  
Power Consumption ◽  
Low Power ◽  
Interconnection Networks ◽  
High Performance ◽  
Critical Issue ◽  
Content Management ◽  
Structure Design ◽  
Portable Devices ◽  
On Chip

In the last years, embedded systems have evolved so that they offer capabilities we could only find before in high performance systems. Portable devices already have multiprocessors on-chip (such as PowerPC 476FP or ARM Cortex A9 MP), usually multi-threaded, and a powerful multi-level cache memory hierarchy on-chip. As most of these systems are battery-powered, the power consumption becomes a critical issue. Achieving high performance and low power consumption is a high complexity challenge where some proposals have been already made. Suarez et al. proposed a new cache hierarchy on-chip, the LP-NUCA (Low Power NUCA), which is able to reduce the access latency taking advantage of NUCA (Non-Uniform Cache Architectures) properties. The key points are decoupling the functionality, and utilizing three specialized networks on-chip. This structure has been proved to be efficient for data hierarchies, achieving a good performance and reducing the energy consumption. On the other hand, instruction caches have different requirements and characteristics than data caches, contradicting the low-power embedded systems requirements, especially in SMT (simultaneous multi-threading) environments. We want to study the benefits of utilizing small tiled caches for the instruction hierarchy, so we propose a new design, ID-LP-NUCAs. Thus, we need to re-evaluate completely our previous design in terms of structure design, interconnection networks (including topologies, flow control and routing), content management (with special interest in hardware/software content allocation policies), and structure sharing. In CMP environments (chip multiprocessors) with parallel workloads, coherence plays an important role, and must be taken into consideration.

Sign in / Sign up

Export Citation Format

Share Document