scholarly journals Integrating proof-based and model-checking techniques for the formal verification of cryptographic protocols

1998 ◽  
pp. 77-87 ◽  
Author(s):  
Dominique Bolignano
Keyword(s):  
Model Checking ◽  
Formal Verification ◽  
Cryptographic Protocols

Modeling security properties of authentication of cryptographic protocols using spin formal verification

2020 ◽  
pp. 21-25
Author(s):  
E.A. Perevyshina ◽  
L.K. Babenko
Keyword(s):  
Model Checking ◽  
Formal Verification ◽  
Temporal Logic ◽  
Cryptographic Protocols ◽  
Wide Range ◽  
Security Properties ◽  
Verification Tools ◽  
The Stability ◽  
Security Property ◽  
Ltl Model Checking

To assess the quality and security of cryptographic protocols, we use various formal verification tools, such as Scyther tool, Avispa, ProVerif. these formal verifiers can check the protocol for vulnerability to attacks on secrecy and authentication, as these are the most prevalent attacks on protocols. However, this is not enough to fully analyze the security of the protocol. In this article, we will use linear temporal logic (LTL) model checking with SPIN. This tool, unlike the formal verifiers listed above, is not designed for a specific application in the context of cryptographic protocols; however, it has a very wide range of possibilities. In particular, for each security property, it is possible to describe the behavior of an attacker and test for the stability of the protocol model to its various attacks. The purpose of this work is to describe the developed methodology for verifying the security of authentication properties using the SPIN verifier.

A Methodology for Automatic Formal Verification of Enterprise Architecture

2019 ◽  
Vol 10 (1) ◽  
pp. 1-19
Author(s):  
Eduard Babkin ◽  
Pavel Malyzhenkov ◽  
Marina Ivanova ◽  
Nikita Ponomarev
Keyword(s):  
Model Checking ◽  
Formal Verification ◽  
Iterative Process ◽  
Enterprise Architecture ◽  
Description Language ◽  
Architecture Description Language ◽  
Business Modeling ◽  
Business Alignment ◽  
Architecture Description ◽  
Software Prototype

For over a decade, IT-business alignment has been ranked as a top-priority management concern, but there is little research on practical ways to achieve the alignment. EA development is a continuous iterative process, which implicitly ensures the achievement of a specific IT-business alignment level. Therefore, it is necessary to formalize the requirements for architecture and be able to automatically verify them. The authors propose a new methodology for detecting logical contradictions in enterprise architecture models based on a model checking approach adopted in the context of business modeling. In such a methodology, they use ArchiMate standard for a conceptual enterprise architecture description language which is fully aligned with TOGAF. The authors also offer several important verification queries and demonstrate practical applicability of their approach using a software prototype of the modeling tool which exploits MIT Alloy Analyzer model checking framework integrated with AchiMate Archi workbench.

scholarly journals System Level Formal Verification via Model Checking Driven Simulation

2013 ◽  
pp. 296-312 ◽  
Author(s):  
Toni Mancini ◽  
Federico Mari ◽  
Annalisa Massini ◽  
Igor Melatti ◽  
Fabio Merli ◽  
...  
Keyword(s):  
Model Checking ◽  
Formal Verification ◽  
System Level

A SAT-Based Planning Approach for Finding Logical Attacks on Cryptographic Protocols

2020 ◽  
Vol 14 (4) ◽  
pp. 1-21
Author(s):  
Noureddine Aribi ◽  
Yahia Lebbah
Keyword(s):  
Model Checking ◽  
State Of The Art ◽  
Cryptographic Protocols ◽  
Protocol Verification ◽  
Planning Problem ◽  
Multiparty Communication ◽  
Planning Approach ◽  
Security Properties ◽  
Sat Solver ◽  
Security Property

Cryptographic protocols form the backbone of digital society. They are concurrent multiparty communication protocols that use cryptography to achieve security goals such as confidentiality, authenticity, integrity, etc., in the presence of adversaries. Unfortunately, protocol verification still represents a critical task and a major cost to engineer attack-free security protocols. Model checking and SAT-based techniques proved quite effective in this context. This article proposes an efficient automatic model checking approach that exemplifies a security property violation. In this approach, a protocol verification is abstracted as a compact planning problem, which is efficiently solved by a state-of-the-art SAT solver. The experiments performed on some real-world cryptographic protocols succeeded in detecting new logical attacks, violating some security properties. Those attacks encompass both “type flaw” and “replay” attacks, which are difficult to tackle with the existing planning-based approaches.

Model Checking for SpaceWire Error Detection Module

2012 ◽  
Vol 241-244 ◽  
pp. 3020-3025
Author(s):  
Ling Ling Dong ◽  
Yong Guan ◽  
Xiao Juan Li ◽  
Zhi Ping Shi ◽  
Jie Zhang ◽  
...  
Keyword(s):  
Model Checking ◽  
Formal Verification ◽  
Temporal Logic ◽  
Error Detection ◽  
System Model ◽  
Linear Search ◽  
Kripke Structure ◽  
Mathematical Methods ◽  
Safety Critical ◽  
Correctness Of Programs

Considerable attention has been devoted to prove the correctness of programs. Formal verification overcomes the incompleteness by applying mathematical methods to verify a design. SpaceWire is a well known communication standard. For safety-critical applications an approach is needed to validate the completeness of SpareWire design. This paper addresses formal verification of SpareWire error detection module. The system model was constructed by Kripke structure, and the properties were presented by linear temporal logic (LTL). Compared the verification of LTL with CTL (branch temporal logic), LTL properties could improve the verification efficiency due to its linear search. The error priority was checked using simulation guided by model checking. After some properties were modified, all possible behaviors of the module satisfied the specification. This method realizes complete validation of the error detection module.

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