Modelization of a multiprocessor architecture

System Modeling and Optimization - Lecture Notes in Control and Information Sciences ◽

10.1007/bfb0006217 ◽

1982 ◽

pp. 878-887

Author(s):

Jean René Menand ◽

Monique Becker

Keyword(s):

Multiprocessor Architecture

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LIPP - a SIMD multiprocessor architecture for image processing

Proceedings of the 10th annual international symposium on Computer architecture - ISCA '83 ◽

10.1145/800046.801679 ◽

1983 ◽

Cited By ~ 11

Author(s):

T. Ericsson ◽

P. E Danielsson

Keyword(s):

Image Processing ◽

Multiprocessor Architecture

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A multiprocessor architecture for circuit simulation

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors ◽

10.1109/iccd.1991.139987 ◽

2002 ◽

Cited By ~ 1

Author(s):

J. Trotter ◽

P. Agrawal

Keyword(s):

Circuit Simulation ◽

Multiprocessor Architecture

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A multiprocessor architecture for viewing solid models

Displays ◽

10.1016/0141-9382(84)90081-7 ◽

1984 ◽

Vol 5 (2) ◽

pp. 97-103 ◽

Cited By ~ 8

Author(s):

J.R. Woodwark

Keyword(s):

Solid Models ◽

Multiprocessor Architecture

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Design of a HyperKYKLOS-based Multiprocessor Architecture for High-Performance Join Operations

The Kluwer International Series in Engineering and Computer Science - Database Machines and Knowledge Base Machines ◽

10.1007/978-1-4613-1679-4_6 ◽

1988 ◽

pp. 75-88 ◽

Cited By ~ 1

Author(s):

B. L. Menezes ◽

K. Thadani ◽

A. G. Dale ◽

R. Jenevein

Keyword(s):

High Performance ◽

Multiprocessor Architecture

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Implications of hierarchical N-body methods for multiprocessor architecture

[1992] Proceedings the 19th Annual International Symposium on Computer Architecture ◽

10.1145/139669.140653 ◽

1992 ◽

Cited By ~ 2

Author(s):

Jaswinder Pal Singh

Keyword(s):

Multiprocessor Architecture

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Critical Block Scheduling: A Thread-Level Parallelizing Mechanism for a Heterogeneous Chip Multiprocessor Architecture

Languages and Compilers for Parallel Computing - Lecture Notes in Computer Science ◽

10.1007/978-3-540-85261-2_18 ◽

2008 ◽

pp. 261-275

Author(s):

Slo-Li Chu

Keyword(s):

Block Scheduling ◽

Chip Multiprocessor ◽

Multiprocessor Architecture

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Performability Evaluation of a Fault-Tolerant Multiprocessor Architecture Using Stochastic Petri Nets

Fault-Tolerant Computing Systems - Informatik-Fachberichte ◽

10.1007/978-3-642-76930-6_22 ◽

1991 ◽

pp. 253-265 ◽

Cited By ~ 1

Author(s):

Roland Lepold

Keyword(s):

Petri Nets ◽

Fault Tolerant ◽

Stochastic Petri Nets ◽

Multiprocessor Architecture

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Embedded Multiprocessor Architecture using VHDL

Proceedings of the International Conference on Advances in Computer Science and Electronics Engineering ◽

10.3850/978-981-07-1403-1_202 ◽

2012 ◽

Author(s):

Sumedh. S. Jadhav ◽

Bhoyar C. N.

Keyword(s):

Multiprocessor Architecture

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Fuzzy Decision Efficiency for Multiprocessor Architecture Configuration

Procedia Computer Science ◽

10.1016/j.procs.2019.09.185 ◽

2019 ◽

Vol 159 ◽

pp. 301-312

Author(s):

Najar Yousra ◽

Ben Ahmed Samir

Keyword(s):

Fuzzy Decision ◽

Multiprocessor Architecture ◽

Decision Efficiency

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An FPGA multiprocessor architecture for Bayesian online change point detection using stochastic computation

Microprocessors and Microsystems ◽

10.1016/j.micpro.2019.102968 ◽

2020 ◽

Vol 74 ◽

pp. 102968 ◽

Cited By ~ 1

Author(s):

Tomas Figliolia ◽

Andreas G. Andreou

Keyword(s):

Change Point ◽

Change Point Detection ◽

Multiprocessor Architecture ◽

Point Detection

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