Constant-time hough transform on the processor arrays with reconfigurable bus systems

Computing ◽  
1994 ◽  
Vol 52 (1) ◽  
pp. 1-15 ◽  
Author(s):  
S. -S. Lin
Keyword(s):  
Hough Transform ◽  
Constant Time ◽  
Processor Arrays

A PARALLEL ALGORITHM TO GENERATE N-ARY REFLECTED GRAY CODES IN A LINEAR ARRAY WITH RECONFIGURABLE BUS SYSTEM

1993 ◽  
Vol 03 (02) ◽  
pp. 157-164 ◽  
Author(s):  
P. THANGAVEL ◽  
V.P. MUTHUSWAMY
Keyword(s):  
Parallel Algorithm ◽  
Linear Array ◽  
Constant Time ◽  
Processor Array ◽  
Gray Codes ◽  
System A ◽  
Processor Arrays ◽  
Bus System

A simple parallel algorithm for generating N-ary reflected Gray codes is presented. The algorithm is derived from the pattern of N-ary reflected Gray codes. The algorithm runs on a linear processor array with a reconfigurable bus system. A reconfigurable bus system is a bus system whose configuration can be dynamically changed. Recently processor arrays with reconfigurable bus systems were used to solve many problems in constant time. There already exists experimental reconfigurable chips.

A CONSTANT TIME ALGORITHM FOR REDUNDANCY ELIMINATION IN TASK GRAPHS ON PROCESSOR ARRAYS WITH RECONFIGURABLE BUS SYSTEMS

1993 ◽  
Vol 03 (02) ◽  
pp. 171-177 ◽  
Author(s):  
B. PRADEEP ◽  
C. SIVA RAM MURTHY
Keyword(s):  
Parallel Algorithm ◽  
Time Algorithm ◽  
Constant Time ◽  
Redundancy Elimination ◽  
Task Graphs ◽  
Processor Arrays ◽  
Precedence Graph ◽  
Practical Tool ◽  
Algorithm Parallelization

The task or precedence graph formalism is a practical tool to study algorithm parallelization. Redundancy in such task graphs gives rise to numerous avoidable inter-task dependencies which invariably complicates the process of parallelization. In this paper we present an O(1) time algorithm for the elimination of redundancy in such graphs on Processor Arrays with Reconfigurable Bus Systemusing O(n4) processors, The previous parallel algorithm available in the literature for redundancy elimination in task graphs takes O(n2) time using O(n) processors.

ON THE POWER OF TWO-DIMENSIONAL PROCESSOR ARRAYS WITH RECONFIGURABLE BUS SYSTEMS

1991 ◽  
Vol 01 (01) ◽  
pp. 29-34 ◽  
Author(s):  
STEPHAN OLARIU ◽  
JAMES L. SCHWING ◽  
JINGYUAN ZHANG
Keyword(s):  
Shared Memory ◽  
Constant Time ◽  
Processor Array ◽  
Two Dimensional ◽  
Parity Problem ◽  
Processor Arrays ◽  
Bus System

Quite recently it has been proved that a two-dimensional processor array with a reconfigurable bus system (PARBS, for short) is at least as powerful as the CRCW shared memory computer. In this note we argue that the well-known PARITY problem can be solved in O(1) time on a two-dimensional PARBS of (n+1)×n processors. Since it is known that PARITY cannot be solved in constant time on a CRCW even if a polynomial number of processors is available, our result shows that the two-dimensional PARBS is strictly more powerful than the CRCW.

A constant time algorithm for computing hough transform

1993 ◽  
Vol 26 (2) ◽  
pp. 277-286 ◽  
Author(s):  
Tzong-Wann Kao ◽  
Shi-Jinn Horng ◽  
Yue-Li Wang ◽  
Kuo-Liang Chung
Keyword(s):  
Hough Transform ◽  
Time Algorithm ◽  
Constant Time

A MORE EFFICIENT CONSTANT TIME ALGORITHM FOR COMPUTING THE HOUGH TRANSFORM

1994 ◽  
Vol 04 (01n02) ◽  
pp. 45-52 ◽  
Author(s):  
YI PAN
Keyword(s):  
Parameter Space ◽  
Real World ◽  
Hough Transform ◽  
Time Complexity ◽  
Time Algorithm ◽  
Constant Time ◽  
Reconfigurable Mesh

An efficient Hough transform algorithm on a reconfigurable mesh is proposed in this paper. For a problem with N edge pixels and an n×n parameter space, our algorithm runs in constant time on a 4-dimensional N× log 2N×n×n reconfigurable mesh. The previous best algorithm for the same problem runs in a constant time on a 4-dimensional n×N×N×N reconfigurable mesh. Since n is always smaller than N in real world (in fact, n is in the order of N1/2), our algorithm reduces the number of processors used drastically while keeping the same time complexity.

Sign in / Sign up

Export Citation Format

Share Document