Amplitude angle-to-code converter with sine-cosine rotary transformers

Existing asymmetric encryption algorithms involve the storage of a secret private key, authorized access to which, as a rule, is carried out upon presentation of a password. Passwords are vulnerable to social engineering and human factors. Combining biometric security techniques with cryptography is seen as a possible solution to this problem, but any biometric cryptosystem should be able to overcome the small differences that exist between two different implementations of the same biometric parameter. This is especially true for dynamic biometrics, when differences can be caused by a change in the psychophysiological state of the subject. The solution to the problems is the use of a system based on the "biometrics-code" converter, which is configured to issue a user key after presentation of his/her biometric image. In this case, the key is generated in advance in accordance with accepted standards without the use of biometric images. The work presents results on using thermal images of a user for reliable biometric authentication based on a neural network "biometrics-code" converter. Thermal images have recently been used as a new approach in biometric identification systems and are a special type of biometric images that allow us to solve the problem of both the authentication of the subject and the identification of his psychophysiological state. The advantages of thermal imaging are that this technology is now becoming available and mobile, allowing the user to be identified and authenticated in a non-contact and continuous manner. In this paper, an experiment was conducted to verify the images of thermograms of 84 subjects and the following indicators of erroneous decisions were obtained: EER = 0.85 % for users in the "normal"state.

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Modified Low Power Binary to Excess Code Converter

International Journal of New Practices in Management and Engineering ◽

10.17762/ijnpme.v4i03.38 ◽

2015 ◽

Vol 4 (03) ◽

pp. 06-10

Author(s):

Ms. Mayuri Ingole

Keyword(s):

Integrated Circuits ◽

Low Power ◽

High Performance ◽

Major Aspect ◽

Code Converter ◽

Ripple Carry Adder ◽

Carry Select Adder ◽

The One

Utilization of power is a major aspect in the design of integrated circuits. Since, adders are mostly employed in these circuits, we should design them effectively. Here, we propose an easy and effective method in decreasing the maximum consumption of power. Carry Select Adder is the one which is dependent on the design of two adders. We present a high performance low-power adder that is implemented. Also, here in Carry Select Adder, Binary Excess Code-1is replaced by Ripple Carry Adder. After analyzing the results, we can come to a conclusion that the architecture which is proposed will have better results in terms of consumption of power compared to conventional techniques.

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Sonus SMX-2000 SMPTE-MIDI Time Code Converter

Computer Music Journal ◽

10.2307/3679722 ◽

1990 ◽

Vol 14 (2) ◽

pp. 85

Author(s):

Joseph Rothstein

Keyword(s):

Time Code ◽

Code Converter

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Design of Reversible Binary-to-Gray Code Converter in Quantum-Dot Cellular Automata

Lecture Notes in Electrical Engineering - Design and Testing of Reversible Logic ◽

10.1007/978-981-13-8821-7_14 ◽

2019 ◽

pp. 251-261

Author(s):

I. Gassoumi ◽

L. Touil ◽

B. Ouni

Keyword(s):

Cellular Automata ◽

Quantum Dot ◽

Gray Code ◽

Quantum Dot Cellular Automata ◽

Code Converter

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Tunable optical code converter using XPM and linear-slope pulse streams generated by FBGs

Optics Letters ◽

10.1364/ol.39.000355 ◽

2014 ◽

Vol 39 (2) ◽

pp. 355 ◽

Cited By ~ 4

Author(s):

Takahiro Kodama ◽

Naoya Wada ◽

Gabriella Cincotti ◽

Ken-ichi Kitayama

Keyword(s):

Code Converter ◽

Pulse Streams ◽

Linear Slope

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Design of Quantum Cost, Garbage Output and Delay Optimized BCD to Excess-3 and 2’s Complement Code Converter

Journal of Circuits System and Computers ◽

10.1142/s0218126618501840 ◽

2018 ◽

Vol 27 (12) ◽

pp. 1850184 ◽

Cited By ~ 4

Author(s):

Heranmoy Maity ◽

Arijit Kumar Barik ◽

Arindam Biswas ◽

Anup Kumar Bhattacharjee ◽

Anita Pal

Keyword(s):

Logic Gate ◽

Logic Circuits ◽

Reversible Logic ◽

Combinational Logic ◽

Quantum Cost ◽

Code Converter ◽

Garbage Output ◽

Combinational Logic Circuits ◽

Logic Functions

In this paper, we have proposed a new reversible logic gate (NG) and also the quantum cost (QC), garbage outputs, delay optimized reversible combinational logic circuits such as four bit 2’s complement code converter circuit, BCD to Excess-3 code converter using reversible logic gate. The proposed NG is used to design a four bit 2’s complement code converter circuit, BCD to Excess-3 code converter and realization of different logic functions such as NOT, AND, NAND, OR, NOR, XOR, NXOR. The proposed (new reversible logic) gate is represented by quantum implementation. The proposed work is verified by Xilinx-ISE simulator software and others logic circuits are also verified. The QC of proposed gate is 5. The QC of four bit 2’s complement code converter and BCD to Excess-3 code converter are 11 and 14 which are better with respect to previous reported results.

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