Software architecture for hard real-time applications: Cyclic executives vs. fixed priority executives

1992 ◽  
Vol 4 (1) ◽  
pp. 37-53 ◽  
Author(s):  
C. Douglass Locke
Author(s):  
B. Shameedha Begum ◽  
N. Ramasubramanian

Embedded systems are designed for a variety of applications ranging from Hard Real Time applications to mobile computing, which demands various types of cache designs for better performance. Since real-time applications place stringent requirements on performance, the role of the cache subsystem assumes significance. Reconfigurable caches meet performance requirements under this context. Existing reconfigurable caches tend to use associativity and size for maximizing cache performance. This article proposes a novel approach of a reconfigurable and intelligent data cache (L1) based on replacement algorithms. An intelligent embedded data cache and a dynamic reconfigurable intelligent embedded data cache have been implemented using Verilog 2001 and tested for cache performance. Data collected by enabling the cache with two different replacement strategies have shown that the hit rate improves by 40% when compared to LRU and 21% when compared to MRU for sequential applications which will significantly improve performance of embedded real time application.


Author(s):  
M. González Harbour ◽  
M. Aldea Rivas ◽  
J. J. Gutiérrez García ◽  
J. C. Palencia Gutiérrez

2014 ◽  
Vol 536-537 ◽  
pp. 566-569
Author(s):  
Feng Xiang Zhang

This paper focus on two level hierarchical scheduling where several real-time applications are scheduled by the fixed priority algorithms. The application with its real-time tasks is bound to a server which can be modeled as a sporadic task with special care for the schedulability analysis. Different scheduling policies and servers can be applied for hierarchical fixed priority systems, this paper gives a closer review of schedulability analysis for applications and tasks when the global and local schedulers of a system are fixed priority.


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