Theory of the Non-linear Analog Phase Locked Loop

2004 ◽  
Author(s):  
Nikolaos I. Margaris
Keyword(s):  
Phase Locked Loop ◽  
Linear Analog ◽  
Non Linear

scholarly journals Distribution system power quality compensation using a HSeAPF based on SRF and SMC features

2021 ◽  
Author(s):  
Akram Qashou ◽  
Sufian Yousef ◽  
Abdallah A. Smadi ◽  
Amani A. AlOmari
Keyword(s):  
Power Distribution ◽  
Distribution System ◽  
Reactive Power ◽  
Sliding Mode ◽  
Distribution Network ◽  
Harmonic Distortion ◽  
Phase Locked Loop ◽  
Voltage Source ◽  
Voltage Source Converter ◽  
Non Linear

AbstractThe purpose of this paper is to describe the design of a Hybrid Series Active Power Filter (HSeAPF) system to improve the quality of power on three-phase power distribution grids. The system controls are comprise of Pulse Width Modulation (PWM) based on the Synchronous Reference Frame (SRF) theory, and supported by Phase Locked Loop (PLL) for generating the switching pulses to control a Voltage Source Converter (VSC). The DC link voltage is controlled by Non-Linear Sliding Mode Control (SMC) for faster response and to ensure that it is maintained at a constant value. When this voltage is compared with Proportional Integral (PI), then the improvements made can be shown. The function of HSeAPF control is to eliminate voltage fluctuations, voltage swell/sag, and prevent voltage/current harmonics are produced by both non-linear loads and small inverters connected to the distribution network. A digital Phase Locked Loop that generates frequencies and an oscillating phase-locked output signal controls the voltage. The results from the simulation indicate that the HSeAPF can effectively suppress the dynamic and harmonic reactive power compensation system. Also, the distribution network has a low Total Harmonic Distortion (< 5%), demonstrating that the designed system is efficient, which is an essential requirement when it comes to the IEEE-519 and IEC 61,000–3-6 standards.

scholarly journals Non-Linear Mathematical Modelling for Phase Locked Loop

2018 ◽  
Vol 7 (4.10) ◽  
pp. 81
Author(s):  
Prithiviraj R ◽  
Selvakumar J
Keyword(s):  
High Speed ◽  
Linear Models ◽  
Low Cost ◽  
Phase Error ◽  
Phase Locked Loop ◽  
Cmos Technology ◽  
Low Noise ◽  
Voltage Controlled Oscillator ◽  
Loop Filter ◽  
Non Linear

Design of Phase Locked Loop (PLL) plays a vital role in transceiver field. Phase Locked Loop comprises of three blocks, namely Phase and frequency detector, loop filter and voltage-controlled oscillator. The greater advancements in CMOS technology such as high frequency, high speed, low noise and phase error leads to low-cost PLL This work aims to develop higher order non-linear models of general Phase Locked Loop. The condition of stability and choice of loop filter is also determined. Based on the analysis, the transfer function for PLL is determined.  

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