A Pipelined Hardware Architecture for Motion Estimation of H.264/AVC

Advances in Computer Systems Architecture - Lecture Notes in Computer Science ◽

10.1007/11572961_8 ◽

2005 ◽

pp. 79-89 ◽

Cited By ~ 2

Author(s):

Su-Jin Lee ◽

Cheong-Ghil Kim ◽

Shin-Dug Kim

Keyword(s):

Motion Estimation ◽

Hardware Architecture

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Motion-estimation/motion-compensation hardware architecture for a scene-adaptive algorithm on a single-chip MPEG-2 MP@ML video encoder

10.1117/12.334739 ◽

1998 ◽

Author(s):

Koyo Nitta ◽

Toshihiro Minami ◽

Toshio Kondo ◽

Takeshi Ogura

Keyword(s):

Motion Estimation ◽

Motion Compensation ◽

Adaptive Algorithm ◽

Hardware Architecture ◽

Single Chip ◽

Video Encoder

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Integer-pel Motion Estimation specific instructions and their hardware architecture for ASIP

2011 IEEE International Symposium of Circuits and Systems (ISCAS) ◽

10.1109/iscas.2011.5937725 ◽

2011 ◽

Cited By ~ 3

Author(s):

Hee Kwan Eun ◽

Sung Jo Hwang ◽

Myung Hoon Sunwoo ◽

Young Hwan Kim ◽

Hi Seok Kim

Keyword(s):

Motion Estimation ◽

Hardware Architecture

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Bit plane matching based variable block size motion estimation method and its hardware architecture

IEEE Transactions on Consumer Electronics ◽

10.1109/tce.2010.5606306 ◽

2010 ◽

Vol 56 (3) ◽

pp. 1625-1633 ◽

Cited By ~ 15

Author(s):

Anil Celebi ◽

Hyuk-jae Lee ◽

Sarp Erturk

Keyword(s):

Motion Estimation ◽

Estimation Method ◽

Block Size ◽

Hardware Architecture ◽

Variable Block ◽

Bit Plane

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A high performance hardware architecture for multi-frame hierarchical motion estimation

IEEE Transactions on Consumer Electronics ◽

10.1109/tce.2011.5955224 ◽

2011 ◽

Vol 57 (2) ◽

pp. 794-801 ◽

Cited By ~ 8

Author(s):

Huong Ho ◽

Robert Klepko ◽

Nam Ninh ◽

Demin Wang

Keyword(s):

Motion Estimation ◽

High Performance ◽

Hardware Architecture

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Selective gray-coded bit-plane based low-complexity motion estimation and its hardware architecture

IEEE Transactions on Consumer Electronics ◽

10.1109/tce.2016.7448566 ◽

2016 ◽

Vol 62 (1) ◽

pp. 76-84 ◽

Cited By ~ 9

Author(s):

Seda Yavuz ◽

Anil Celebi ◽

Muhammad Aslam ◽

Oguzhan Urhan

Keyword(s):

Motion Estimation ◽

Low Complexity ◽

Hardware Architecture ◽

Bit Plane

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An Efficient Hardware Architecture for Quarter-Pixel Accurate H.264 Motion Estimation

10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007) ◽

10.1109/dsd.2007.4341507 ◽

2007 ◽

Cited By ~ 16

Author(s):

Serkan Oktem ◽

Ilker Hamzaoglu

Keyword(s):

Motion Estimation ◽

Hardware Architecture

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A High Performance Hardware Architecture for Half-Pixel Accurate H.264 Motion Estimation

2006 IFIP International Conference on Very Large Scale Integration ◽

10.1109/vlsisoc.2006.313205 ◽

2006 ◽

Cited By ~ 13

Author(s):

Sinan Yalcin ◽

Ilker Hamzaoglu

Keyword(s):

Motion Estimation ◽

High Performance ◽

Hardware Architecture

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An adaptive bilateral motion estimation algorithm and its hardware architecture

2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip ◽

10.1109/vlsisoc.2010.5642661 ◽

2010 ◽

Cited By ~ 2

Author(s):

Abdulkadir Akin ◽

Mert Cetin ◽

Burak Erbagci ◽

Ozgur Karakaya ◽

Ilker Hamzaoglu

Keyword(s):

Motion Estimation ◽

Estimation Algorithm ◽

Hardware Architecture ◽

Motion Estimation Algorithm

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One-dimensional filtering based two-bit transform and its efficient hardware architecture for fast motion estimation

IEEE Transactions on Consumer Electronics ◽

10.1109/tce.2017.015085 ◽

2017 ◽

Vol 63 (4) ◽

pp. 377-385 ◽

Cited By ~ 2

Author(s):

Aysun Tasyapi Celebi ◽

Seda Yavuz ◽

Anil Celebi ◽

Oguzhan Urban

Keyword(s):

Motion Estimation ◽

Hardware Architecture ◽

Fast Motion Estimation ◽

One Dimensional ◽

Fast Motion

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A low power and standard-compliant RDO motion estimation hardware architecture for VBSME

The 2010 International Conference on Green Circuits and Systems ◽

10.1109/icgcs.2010.5543104 ◽

2010 ◽

Author(s):

Xing Wen ◽

Oscar C. Au ◽

Jiang Xu ◽

Lu Fang ◽

Run Cha ◽

...

Keyword(s):

Motion Estimation ◽

Low Power ◽

Hardware Architecture

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